adapt to changes in cortex-m-srp

This commit is contained in:
Jorge Aparicio
2017-04-10 09:34:37 -05:00
parent b83ad5aa07
commit a03ad00a1b
7 changed files with 83 additions and 111 deletions

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@@ -1,82 +0,0 @@
//! LED blinking
//!
//! This example is specific to the STM32F3DISCOVERY board
#![feature(const_fn)]
#![no_std]
extern crate cortex_m;
extern crate cortex_m_rt;
extern crate cortex_m_srp;
extern crate {{name}};
use core::cell::Cell;
use cortex_m::ctxt::Local;
use cortex_m::exception;
use cortex_m_srp::{C0, ResourceP};
use {{name}}::interrupt::{self, Interrupt};
// INITIALIZATION
fn main() {
cortex_m::interrupt::free(|cs| {
let gpioe = {{name}}::GPIOE.borrow(&cs);
let nvic = cortex_m::peripheral::NVIC.borrow(&cs);
let rcc = {{name}}::RCC.borrow(&cs);
let tim7 = {{name}}::TIM7.borrow(&cs);
// enable peripherals
rcc.ahbenr.modify(|_, w| unsafe { w.iopeen().bits(1) });
rcc.apb1enr.modify(|_, w| unsafe { w.tim7en().bits(1) });
// configure PE8 as output
gpioe.moder.modify(|_, w| unsafe { w.moder8().bits(0b01) });
// 1 Hz timeout
tim7.dier.modify(|_, w| unsafe { w.uie().bits(1) });
tim7.psc.write(|w| unsafe { w.psc().bits(122) });
tim7.arr.write(|w| unsafe { w.arr().bits(65040) });
tim7.cr1.write(|w| unsafe { w.cen().bits(1) });
nvic.enable(Interrupt::Tim7);
});
}
// RESOURCES
static GPIOE: ResourceP<{{name}}::Gpioe, C0> =
unsafe { ResourceP::new({{name}}::GPIOE) };
static TIM7: ResourceP<{{name}}::Tim7, C0> =
unsafe { ResourceP::new({{name}}::TIM7) };
// TASKS
extern "C" fn blinky(ctxt: interrupt::Tim7) {
static STATE: Local<Cell<bool>, interrupt::Tim7> =
Local::new(Cell::new(false));
let gpioe = GPIOE.borrow(&ctxt);
let state = STATE.borrow(&ctxt);
let tim7 = TIM7.borrow(&ctxt);
// Clear the update flag
tim7.sr.modify(|_, w| unsafe { w.uif().bits(0) });
// Toggle the state
state.set(!state.get());
// Blink!
if state.get() {
gpioe.bsrr.write(|w| unsafe { w.br8().bits(1) });
} else {
gpioe.bsrr.write(|w| unsafe { w.bs8().bits(1) });
}
}
// GLUE
#[no_mangle]
pub static _INTERRUPTS: interrupt::Handlers =
interrupt::Handlers { tim7: blinky, ..interrupt::DEFAULT_HANDLERS };
#[no_mangle]
pub static _EXCEPTIONS: exception::Handlers =
exception::Handlers { ..exception::DEFAULT_HANDLERS };

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@@ -1,5 +1,6 @@
//! Prints "Hello, world!" on the OpenOCD console using semihosting
#![feature(used)]
#![no_std]
#[macro_use]
@@ -7,17 +8,14 @@ extern crate cortex_m;
extern crate cortex_m_rt;
extern crate {{name}};
use cortex_m::exception;
use {{name}}::interrupt;
fn main() {
hprintln!("Hello, world!");
}
#[no_mangle]
pub static _INTERRUPTS: interrupt::Handlers =
#[allow(dead_code)]
#[used]
#[link_section = ".rodata.interrupts"]
static INTERRUPTS: interrupt::Handlers =
interrupt::Handlers { ..interrupt::DEFAULT_HANDLERS };
#[no_mangle]
pub static _EXCEPTIONS: exception::Handlers =
exception::Handlers { ..exception::DEFAULT_HANDLERS };

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@@ -5,6 +5,7 @@
//!
//! [`itmdump`]: https://docs.rs/itm/0.1.1/itm/
#![feature(used)]
#![no_std]
#[macro_use]
@@ -12,21 +13,21 @@ extern crate cortex_m;
extern crate cortex_m_rt;
extern crate {{name}};
use cortex_m::{exception, peripheral};
use cortex_m::peripheral;
use {{name}}::interrupt;
fn main() {
cortex_m::interrupt::free(|cs| {
let itm = peripheral::ITM.borrow(&cs);
cortex_m::interrupt::free(
|cs| {
let itm = peripheral::ITM.borrow(&cs);
iprintln!(&itm.stim[0], "Hello, world!");
});
iprintln!(&itm.stim[0], "Hello, world!");
},
);
}
#[no_mangle]
pub static _INTERRUPTS: interrupt::Handlers =
#[allow(dead_code)]
#[used]
#[link_section = ".rodata.interrupts"]
static INTERRUPTS: interrupt::Handlers =
interrupt::Handlers { ..interrupt::DEFAULT_HANDLERS };
#[no_mangle]
pub static _EXCEPTIONS: exception::Handlers =
exception::Handlers { ..exception::DEFAULT_HANDLERS };

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@@ -1,20 +1,17 @@
//! Minimal application
#![feature(used)]
#![no_std]
extern crate cortex_m;
extern crate cortex_m_rt;
extern crate {{name}};
use cortex_m::exception;
use {{name}}::interrupt;
fn main() {}
#[no_mangle]
pub static _INTERRUPTS: interrupt::Handlers =
#[allow(dead_code)]
#[used]
#[link_section = ".rodata.interrupts"]
static INTERRUPTS: interrupt::Handlers =
interrupt::Handlers { ..interrupt::DEFAULT_HANDLERS };
#[no_mangle]
pub static _EXCEPTIONS: exception::Handlers =
exception::Handlers { ..exception::DEFAULT_HANDLERS };

57
examples/srp.rs Normal file
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@@ -0,0 +1,57 @@
#![feature(const_fn)]
#![feature(used)]
#![no_std]
#[macro_use]
extern crate cortex_m;
extern crate cortex_m_rt;
#[macro_use]
extern crate cortex_m_srp as rtfm;
extern crate {{name}};
use rtfm::{C2, C4, C16, P0, P1, P3, Resource};
use {{name}}::interrupt::{Exti0Irq, Exti1Irq};
static R1: Resource<(), C4> = Resource::new(());
static R2: Resource<(), C2> = Resource::new(());
fn init(_ceil: C16) {}
fn idle(_prio: P0) {
hprintln!("IDLE");
rtfm::request(j1);
}
tasks!({{name}}, {
j1: (Exti0Irq, P1),
j2: (Exti1Irq, P3),
});
fn j1(_task: Exti0Irq, prio: P1) {
hprintln!("J1: enter");
R2.lock(
&prio, |_, _| {
rtfm::request(j2);
hprintln!("J1: after requesting J2");
R1.lock(
&prio, |_, _| {
hprintln!("J1(R1): before requesting J2");
rtfm::request(j2);
hprintln!("J1(R1): after requesting J2");
}
);
}
);
hprintln!("J1: exit");
}
fn j2(_task: Exti1Irq, prio: P3) {
hprintln!("J2: enter");
R1.lock(
&prio, |_, _| {
hprintln!("J2(R1)");
}
);
hprintln!("J2: exit");
}