From 77a0685a17bf3db1c7dde7f8a5fb5e310762a5af Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Thu, 30 Aug 2018 00:25:14 +0200 Subject: [PATCH 1/9] move to cargo-generate; start with QEMU --- .cargo/config | 19 +- Cargo.toml | 12 +- README.md | 487 +++++++++++++++++++++++++++++++++++ debug.gdb | 21 -- examples/hello.rs | 15 +- memory.x | 5 +- openocd.cfg | 2 + openocd.gdb | 12 + src/examples/_0_minimal.rs | 67 ----- src/examples/_1_hello.rs | 41 --- src/examples/_2_itm.rs | 58 ----- src/examples/_3_panic.rs | 47 ---- src/examples/_4_crash.rs | 118 --------- src/examples/_5_exception.rs | 68 ----- src/examples/_6_allocator.rs | 79 ------ src/examples/_7_device.rs | 93 ------- src/examples/mod.rs | 10 - src/lib.rs | 342 ------------------------ src/main.rs | 19 ++ 19 files changed, 529 insertions(+), 986 deletions(-) delete mode 100644 debug.gdb create mode 100644 openocd.cfg create mode 100644 openocd.gdb delete mode 100644 src/examples/_0_minimal.rs delete mode 100644 src/examples/_1_hello.rs delete mode 100644 src/examples/_2_itm.rs delete mode 100644 src/examples/_3_panic.rs delete mode 100644 src/examples/_4_crash.rs delete mode 100644 src/examples/_5_exception.rs delete mode 100644 src/examples/_6_allocator.rs delete mode 100644 src/examples/_7_device.rs delete mode 100644 src/examples/mod.rs delete mode 100644 src/lib.rs create mode 100644 src/main.rs diff --git a/.cargo/config b/.cargo/config index d5176c3..01b30cb 100644 --- a/.cargo/config +++ b/.cargo/config @@ -1,5 +1,4 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] -# runner = 'arm-none-eabi-gdb -x debug.gdb' rustflags = [ # LLD (shipped with the Rust toolchain) is used as the default linker "-C", "link-arg=-Tlink.x", @@ -16,23 +15,9 @@ rustflags = [ # "-C", "link-arg=-nostartfiles", ] -# work around rust-lang/cargo#5946 -[target.thumbv6m-none-eabi] -runner = 'arm-none-eabi-gdb -x debug.gdb' - -[target.thumbv7m-none-eabi] -runner = 'arm-none-eabi-gdb -x debug.gdb' - -[target.thumbv7em-none-eabi] -runner = 'arm-none-eabi-gdb -x debug.gdb' - -[target.thumbv7em-none-eabihf] -runner = 'arm-none-eabi-gdb -x debug.gdb' -# end of workaround - [build] -# Pick one of these compilation targets +# Pick ONE of these compilation targets # target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ -# target = "thumbv7m-none-eabi" # Cortex-M3 +target = "thumbv7m-none-eabi" # Cortex-M3 # target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) # target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) \ No newline at end of file diff --git a/Cargo.toml b/Cargo.toml index 08eb8d6..e4e5d8b 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,13 +1,7 @@ [package] -authors = ["Jorge Aparicio "] -categories = ["embedded", "no-std"] -description = "A template for building applications for ARM Cortex-M microcontrollers" -documentation = "https://rust-embedded.github.io/cortex-m-quickstart/cortex_m_quickstart" -keywords = ["arm", "cortex-m", "template"] -license = "MIT OR Apache-2.0" -name = "cortex-m-quickstart" -repository = "https://github.com/japaric/cortex-m-quickstart" -version = "0.3.4" +authors = ["{{authors}}"] +name = "{{project-name}}" +version = "0.1.0" [dependencies] cortex-m = "0.5.6" diff --git a/README.md b/README.md index b94edfe..3ce896f 100644 --- a/README.md +++ b/README.md @@ -6,6 +6,493 @@ This project is developed and maintained by the [Cortex-M team][team]. # [Documentation](https://rust-embedded.github.io/cortex-m-quickstart/cortex_m_quickstart) +## Dependencies + +To build embedded programs using this template you'll need: + +- Nightly Rust toolchain from 2018-08-28 or newer: `rustup default nightly` +- The `cargo generate` subcommand: `cargo install cargo-generate` +- `rust-std` components (pre-compiled `core` crate) for the ARM Cortex-M + targets. Run: + +``` console +$ rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabi thumbv7em-none-eabihf +``` + +## Non-dependencies + +This section list programs that are *not* required to build embedded programs +but are useful or necessary for embedded development. + +To flash (put the firmware on the target device) and debug embedded programs +you'll need these additional programs: + + + + +- GDB with ARM support or LLDB, for debugging. +- QEMU with ARM support, for running embedded programs on the build machine. +- OpenOCD and similar, which make debugging possible at all. + +To inspect the produced binaries you'll want [`cargo-binutils`]. + +[`cargo-binutils`]: https://crates.io/crates/cargo-binutils + +## Usage + +### First timers + +#### Building + +If you are already familiar with the process of building and debugging embedded +Rust programs feel free to skip this section! + +To get you familiar with building and debugging embedded Rust programs we'll use +the template with its default values to build a program for the LM3S6965, a +microcontroller with a Cortex-M3 core that QEMU can emulate. + +In this section we'll use a debugger (GDB or LLDB) and QEMU. Be sure to have +them installed! + +1. Initialize the template + +``` console +$ cargo generate --git https://github.com/rust-embedded/cortex-m-quickstart +``` + +2. Build the example "Hello, world!" program + +``` rust +// example/hello.rs +#![no_main] +#![no_std] + +#[macro_use] +extern crate cortex_m_rt; +extern crate cortex_m_semihosting as sh; +extern crate panic_semihosting; + +use core::fmt::Write; + +use sh::hio; + +entry!(main); + +fn main() -> ! { + let mut stdout = hio::hstdout().unwrap(); + writeln!(stdout, "Hello, world!").unwrap(); + + loop {} +} +``` + +We'll cross compile the program for the `thumbv7m-none-eabi` target. This target +covers Cortex-M3 devices like the one we are targeting. + +``` console +$ cargo build --target thumbv7m-none-eabi --example hello +``` +You'll find the output binary in the following path: +`target/thumbv7m-none-eabi/debug/examples/hello`. The output is an ELF file. + +If you have `file` installed you can print the file type of the output to +confirm it's an ELF file: + +``` +$ ( cd target/thumbv7m-none-eabi/debug/examples && file hello ) +hello: ELF 32-bit LSB executable, ARM, EABI5 version 1 (SYSV), statically linked, with debug_info, not stripped +``` + +If you have `cargo-binutils` installed you can look at the ELF header of the +output: + +> NOTE `cargo-readelf` will be available in a *future* release of binutils +> (v0.1.3) + +``` console +$ cargo readelf --example hello -- --file-headers +``` + +``` text +ELF Header: + Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 + Class: ELF32 + Data: 2's complement, little endian + Version: 1 (current) + OS/ABI: UNIX - System V + ABI Version: 0x0 + Type: EXEC (Executable file) + Machine: ARM + Version: 0x1 + Entry point address: 0x23A3 + Start of program headers: 52 (bytes into file) + Start of section headers: 673340 (bytes into file) + Flags: 0x5000200 + Size of this header: 52 (bytes) + Size of program headers: 32 (bytes) + Number of program headers: 2 + Size of section headers: 40 (bytes) + Number of section headers: 21 + Section header string table index: 19 +``` + +If you look at the bottom of the Cargo configuration file (`.cargo/config`) +you'll see that the `thumbv7m-none-eabi` target has been set as the default +compilation target. This means that you do *not* need to pass the `--target` +flag to cross compile because it's already implied. So: + +``` console +$ cargo build --example hello +``` + +Does the same as before. + +3. There's no step 3! Your build is done, but for completeness let's look at how + to run this program on QEMU. + +#### Running the program on QEMU + +Execute this command and you are done. + +``` console +$ qemu-system-arm \ + -cpu cortex-m3 \ + -machine lm3s6965evb \ + -nographic \ + -semihosting-config enable=on,target=native \ + -kernel target/thumbv7m-none-eabi/debug/examples/hello +Hello, world! +``` + +The above command will block the terminal because the `hello` program never +ends! To terminate QEMU input this in your terminal: `Ctrl+A`, followed by `X`. + +Let me break down that long command for you: + +- `qemu-system-arm`. This is the QEMU emulator. There are a few variants of + these QEMU binaries; this one does full *system* emulation of *ARM* machines + -- hence the name. + +- `-cpu cortex-m3`. This tells QEMU to emulate a Cortex-M3 CPU. Specifying the + CPU model lets us catch some miscompilation errors: for example, running a + program compiled for the Cortex-M4F, which has a hardware FPU, will make QEMU + error during its execution. + +- `-machine lm3s6965evb`. This tells QEMU to emulate the LM3S6965EVB, a + evaluation board that contains a LM3S6965 microcontroller. + +- `-nographic`. This tells QEMU to not launch its GUI. + +- `-semihosting-config (..)`. This tells QEMU to enable semihosting. Semihosting + lets the emulated device, among other things, use the host stdout, stderr and + stdin and create files on the host. + +- `-kernel $file`. This tells QEMU which binary to flash (kind of) and run on + the emulated machine. + +#### Debugging + +First, we launch a QEMU instance: + +``` console +$ qemu-system-arm \ + -cpu cortex-m3 \ + -machine lm3s6965evb \ + -nographic \ + -semihosting-config enable=on,target=native \ + -gdb tcp::3333 \ + -S \ + -kernel target/thumbv7m-none-eabi/debug/examples/hello +``` + +Note that this command won't print anything to the console but will block the +terminal. We have passed two extra flags this time: + +- `-gdb tcp::3333`. This tells QEMU to wait for a GDB connection on TCP + port 3333. + +- `-S`. This tells QEMU to freeze the machine at startup. Without this the + program would have reached the end of `main` before we had a chance to launch + the debugger! + +Next, we start up LLDB in another terminal: + +``` console +$ lldb target/thumbv7m-none-eabi/debug/examples/hello +``` + +And tell it to connect to the GDB server that QEMU created: + +``` console +(lldb) gdb-remote 3333 +Process 1 stopped +* thread #1, stop reason = signal SIGTRAP + frame #0: 0x000023a2 hello`Reset at lib.rs:475 + 472 + 473 #[doc(hidden)] + 474 #[no_mangle] +-> 475 pub unsafe extern "C" fn Reset() -> ! { + 476 extern "C" { + 477 // This symbol will be provided by the user via the `entry!` macro + 478 fn main() -> !; +``` + +You'll see that the process is halted and that the program counter is pointing +to a function named `Reset`. That is the reset handler: what Cortex-M cores +execute upon booting. + +This reset handler will eventually call our `main` function. Let's skip all the +way there using a breakpoint and the `continue` command: + +``` console +(lldb) breakpoint set -name hello::main +Breakpoint 1: where = hello`hello::main::h9cf19a1378cbd1b8 + 2 at hello.rs:20, address = 0x000006a8 + +(lldb) continue +Process 1 resuming +Process 1 stopped +* thread #1, stop reason = breakpoint 1.1 + frame #0: 0x000006a8 hello`hello::main::h9cf19a1378cbd1b8 at hello.rs:20 + 17 entry!(main); + 18 + 19 fn main() -> ! { +-> 20 let mut stdout = hio::hstdout().unwrap(); + 21 writeln!(stdout, "Hello, world!").unwrap(); + 22 + 23 loop {} +``` + +We are now close to the code that prints "Hello, world!". Let's move the program +forward using the `next` command. + +``` console +(lldb) next +Process 1 stopped +* thread #1, stop reason = step over + frame #0: 0x000006be hello`hello::main::h9cf19a1378cbd1b8 at hello.rs:21 + 18 + 19 fn main() -> ! { + 20 let mut stdout = hio::hstdout().unwrap(); +-> 21 writeln!(stdout, "Hello, world!").unwrap(); + 22 + 23 loop {} + 24 } + +(lldb) next +Process 1 stopped +* thread #1, stop reason = step over + frame #0: 0x000006f6 hello`hello::main::h9cf19a1378cbd1b8 at hello.rs:23 + 20 let mut stdout = hio::hstdout().unwrap(); + 21 writeln!(stdout, "Hello, world!").unwrap(); + 22 +-> 23 loop {} + 24 } +``` + +At this point you should see "Hello, world!" printed on the terminal that's +running `qemu-system-arm`. + +``` console +$ qemu-system-arm (..) +Hello, world! +``` + +That's it! You can now exit `lldb`, which will also cause QEMU to terminate. + +``` +(lldb) exit +Quitting LLDB will kill one or more processes. Do you really want to proceed: [Y/n] y +``` + +### Not first timers + +#### Building + +This section explains how to configure this template to build programs for some +specific Cortex-M device. + +0. Before everything else, you need to know the characteristics of the target + device: + +- What's the ARM core? e.g. Cortex-M3. + +- Does the ARM core include an FPU? e.g. the Cortex-M4F does. + +- How much Flash memory and RAM does the target device has? e.g. 40 KB of RAM + +- Where is Flash memory and RAM mapped in the address space? e.g. `0x2000_0000` + is common for RAM. + +You should be able to find this information in the data sheet and / or reference +manual of your device. + +As an example, we'll use the [STM32F303VCT6] microcontroller. This device has: + +[STM32F303VCT6]: https://www.st.com/en/microcontrollers/stm32f303vc.html + +- a Cortex-M4F core that includes a single precision FPU + +- 256 KB of Flash located at address `0x0800_0000`. + +- 40 KB of RAM located at address `0x2000_0000`. (There's another RAM region but + for simplicity we'll ignore it). + +1. Initialize the template + +``` console +$ cargo generate --git https://github.com/rust-embedded/cortex-m-quickstart +``` + +2. Set the default compilation target in `.cargo/config`. + +For the STM32F303VCT6, we pick the `thumbv7em-none-eabihf` target as that covers +the Cortex-M4F core. + +``` console +$ tail .cargo/config +``` + +``` toml +[build] +# Pick ONE of these compilation targets +# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ +# target = "thumbv7m-none-eabi" # Cortex-M3 +# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) +target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) +``` + +3. Enter the memory region information into `memory.x`. + +As we mentioned before the STM32F303VCT6 has 40 KB of RAM located at address +`0x2000_0000` and 256 KB of Flash memory located at address `0x0800_0000`. + +``` console +$ cat memory.x +``` + +``` text +MEMORY +{ + /* NOTE K = KiBi = 1024 bytes */ + FLASH : ORIGIN = 0x08000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 40K +} +``` + +4. Build one of the examples: + +``` console +$ cargo build --example hello +``` + +You are done! You should be able to flash and run this example on your +device. + +#### Debugging + +Teaching you how to flash and debug this program on *your* device is out of +scope for this document due to the sheer variety of possible hardware / software +combinations. But the steps required to flash and debug this program on the +[STM32F3DISCOVERY] using OpenOCD are provided below as a reference. + +[STM32F3DISCOVERY]: https://www.st.com/en/evaluation-tools/stm32f3discovery.html + +On a terminal run `openocd` to connect to the ST-LINK on the discovery board. +Run this command from the root of the template; `openocd` will pick up the +`openocd.cfg` file which indicates which interface file and target file to use. + +``` console +$ cat openocd.cfg +``` + +``` text +source [find interface/stlink-v2-1.cfg] +source [find target/stm32f3x.cfg] +``` + +``` console +$ openocd +Open On-Chip Debugger 0.10.0 +Licensed under GNU GPL v2 +For bug reports, read + http://openocd.org/doc/doxygen/bugs.html +Info : auto-selecting first available session transport "hla_swd". To override use 'transport select '. +adapter speed: 1000 kHz +adapter_nsrst_delay: 100 +Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD +none separate +Info : Unable to match requested speed 1000 kHz, using 950 kHz +Info : Unable to match requested speed 1000 kHz, using 950 kHz +Info : clock speed 950 kHz +Info : STLINK v2 JTAG v27 API v2 SWIM v15 VID 0x0483 PID 0x374B +Info : using stlink api v2 +Info : Target voltage: 2.913879 +Info : stm32f3x.cpu: hardware has 6 breakpoints, 4 watchpoints +``` + +On another terminal run GDB, also from the root of the template. + +``` console +$ cat openocd.gdb +``` + +``` text +target remote :3333 + +# print demangled symbols +set print asm-demangle on + +# detect unhandled exceptions and hard faults +break DefaultHandler +break UserHardFault + +monitor arm semihosting enable + +load +``` + +``` console +$ arm-none-eabi-gdb -x openocd.gdb target/thumbv7em-none-eabihf/debug/examples/hello +(..) +Loading section .vector_table, size 0x400 lma 0x8000000 +Loading section .text, size 0x21dc lma 0x8000400 +Loading section .rodata, size 0x6a4 lma 0x80025e0 +Start address 0x800238c, load size 11392 +Transfer rate: 17 KB/sec, 3797 bytes/write. + +(gdb) list +470 #[no_mangle] +471 pub static __RESET_VECTOR: unsafe extern "C" fn() -> ! = Reset; +472 +473 #[doc(hidden)] +474 #[no_mangle] +475 pub unsafe extern "C" fn Reset() -> ! { +476 extern "C" { +477 // This symbol will be provided by the user via the `entry!` macro +478 fn main() -> !; +479 +``` + +The `openocd.gdb` script will connect GDB to OpenOCD and then flash the program +into the device. After that you can do a normal debugging session. + +If you `continue` the program past the semihosting write operation you'll see +"Hello, world" printed on the OpenOCD console. + +``` console +(gdb) continue +``` + +``` console +$ openocd +(..) +Hello, world! +``` + +## Next steps + +> TODO point the reader to embedded-hal, awesome-embedded-rust, etc. + # License Licensed under either of diff --git a/debug.gdb b/debug.gdb deleted file mode 100644 index f2bf090..0000000 --- a/debug.gdb +++ /dev/null @@ -1,21 +0,0 @@ -target remote :3333 - -# print demangled symbols by default -set print asm-demangle on - -monitor arm semihosting enable - -# # send captured ITM to the file itm.fifo -# # (the microcontroller SWO pin must be connected to the programmer SWO pin) -# # 8000000 must match the core clock frequency -# monitor tpiu config internal itm.fifo uart off 8000000 - -# # OR: make the microcontroller SWO pin output compatible with UART (8N1) -# # 2000000 is the frequency of the SWO pin -# monitor tpiu config external uart off 8000000 2000000 - -# # enable ITM port 0 -# monitor itm port 0 on - -load -step diff --git a/examples/hello.rs b/examples/hello.rs index 3c4b5ec..5537379 100644 --- a/examples/hello.rs +++ b/examples/hello.rs @@ -6,13 +6,12 @@ #![no_std] #[macro_use] -extern crate cortex_m_rt as rt; +extern crate cortex_m_rt; extern crate cortex_m_semihosting as sh; extern crate panic_semihosting; use core::fmt::Write; -use rt::ExceptionFrame; use sh::hio; entry!(main); @@ -23,15 +22,3 @@ fn main() -> ! { loop {} } - -exception!(HardFault, hard_fault); - -fn hard_fault(ef: &ExceptionFrame) -> ! { - panic!("HardFault at {:#?}", ef); -} - -exception!(*, default_handler); - -fn default_handler(irqn: i16) { - panic!("Unhandled exception (IRQn = {})", irqn); -} diff --git a/memory.x b/memory.x index 32879e1..ee7e8a8 100644 --- a/memory.x +++ b/memory.x @@ -2,8 +2,9 @@ MEMORY { /* NOTE K = KiBi = 1024 bytes */ /* TODO Adjust these memory regions to match your device memory layout */ - FLASH : ORIGIN = 0x000BAAD0, LENGTH = 0K - RAM : ORIGIN = 0xBAAD0000, LENGTH = 0K + /* These values correspond to the LM3S6965, one of the few devices QEMU can emulate */ + FLASH : ORIGIN = 0x00000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 64K } /* This is where the call stack will be allocated. */ diff --git a/openocd.cfg b/openocd.cfg new file mode 100644 index 0000000..74c9af9 --- /dev/null +++ b/openocd.cfg @@ -0,0 +1,2 @@ +source [find interface/stlink-v2-1.cfg] +source [find target/stm32f3x.cfg] diff --git a/openocd.gdb b/openocd.gdb new file mode 100644 index 0000000..bacba86 --- /dev/null +++ b/openocd.gdb @@ -0,0 +1,12 @@ +target remote :3333 + +# print demangled symbols +set print asm-demangle on + +# detect unhandled exceptions and hard faults +break DefaultHandler +break UserHardFault + +monitor arm semihosting enable + +load \ No newline at end of file diff --git a/src/examples/_0_minimal.rs b/src/examples/_0_minimal.rs deleted file mode 100644 index 8926e23..0000000 --- a/src/examples/_0_minimal.rs +++ /dev/null @@ -1,67 +0,0 @@ -//! Minimal Cortex-M program -//! -//! When executed this program will hit the breakpoint set in `main`. -//! -//! All Cortex-M programs need to: -//! -//! - Contain the `#![no_main]` and `#![no_std]` attributes. Embedded programs don't use the -//! standard Rust `main` interface or the Rust standard (`std`) library. -//! -//! - Define their entry point using [`entry!`] macro. -//! -//! [`entry!`]: https://docs.rs/cortex-m-rt/~0.5/cortex_m_rt/macro.entry.html -//! -//! - Define their panicking behavior, i.e. what happens when `panic!` is called. The easiest way to -//! define a panicking behavior is to link to a [panic handler crate][0] -//! -//! [0]: https://crates.io/keywords/panic-impl -//! -//! - Define the `HardFault` handler using the [`exception!`] macro. This handler (function) is -//! called when a hard fault exception is raised by the hardware. -//! -//! [`exception!`]: https://docs.rs/cortex-m-rt/~0.5/cortex_m_rt/macro..html -//! -//! - Define a default handler using the [`exception!`] macro. This function will be used to handle -//! all interrupts and exceptions which have not been assigned a specific handler. -//! -//! ``` -//! -//! #![no_main] // <- IMPORTANT! -//! #![no_std] -//! -//! extern crate cortex_m; -//! -//! #[macro_use(entry, exception)] -//! extern crate cortex_m_rt as rt; -//! -//! // makes `panic!` print messages to the host stderr using semihosting -//! extern crate panic_semihosting; -//! -//! use cortex_m::asm; -//! use rt::ExceptionFrame; -//! -//! // the program entry point is ... -//! entry!(main); -//! -//! // ... this never ending function -//! fn main() -> ! { -//! loop { -//! asm::bkpt(); -//! } -//! } -//! -//! // define the hard fault handler -//! exception!(HardFault, hard_fault); -//! -//! fn hard_fault(ef: &ExceptionFrame) -> ! { -//! panic!("HardFault at {:#?}", ef); -//! } -//! -//! // define the default exception handler -//! exception!(*, default_handler); -//! -//! fn default_handler(irqn: i16) { -//! panic!("Unhandled exception (IRQn = {})", irqn); -//! } -//! ``` -// Auto-generated. Do not modify. diff --git a/src/examples/_1_hello.rs b/src/examples/_1_hello.rs deleted file mode 100644 index 413c4fb..0000000 --- a/src/examples/_1_hello.rs +++ /dev/null @@ -1,41 +0,0 @@ -//! Prints "Hello, world!" on the OpenOCD console using semihosting -//! -//! --- -//! -//! ``` -//! -//! #![no_main] -//! #![no_std] -//! -//! #[macro_use] -//! extern crate cortex_m_rt as rt; -//! extern crate cortex_m_semihosting as sh; -//! extern crate panic_semihosting; -//! -//! use core::fmt::Write; -//! -//! use rt::ExceptionFrame; -//! use sh::hio; -//! -//! entry!(main); -//! -//! fn main() -> ! { -//! let mut stdout = hio::hstdout().unwrap(); -//! writeln!(stdout, "Hello, world!").unwrap(); -//! -//! loop {} -//! } -//! -//! exception!(HardFault, hard_fault); -//! -//! fn hard_fault(ef: &ExceptionFrame) -> ! { -//! panic!("HardFault at {:#?}", ef); -//! } -//! -//! exception!(*, default_handler); -//! -//! fn default_handler(irqn: i16) { -//! panic!("Unhandled exception (IRQn = {})", irqn); -//! } -//! ``` -// Auto-generated. Do not modify. diff --git a/src/examples/_2_itm.rs b/src/examples/_2_itm.rs deleted file mode 100644 index 568a467..0000000 --- a/src/examples/_2_itm.rs +++ /dev/null @@ -1,58 +0,0 @@ -//! Sends "Hello, world!" through the ITM port 0 -//! -//! ITM is much faster than semihosting. Like 4 orders of magnitude or so. -//! -//! **NOTE** Cortex-M0 chips don't support ITM. -//! -//! You'll have to connect the microcontroller's SWO pin to the SWD interface. Note that some -//! development boards don't provide this option. -//! -//! You'll need [`itmdump`] to receive the message on the host plus you'll need to uncomment two -//! `monitor` commands in the `.gdbinit` file. -//! -//! [`itmdump`]: https://docs.rs/itm/0.2.1/itm/ -//! -//! --- -//! -//! ``` -//! -//! #![no_main] -//! #![no_std] -//! -//! #[macro_use] -//! extern crate cortex_m; -//! #[macro_use] -//! extern crate cortex_m_rt as rt; -//! extern crate panic_semihosting; -//! -//! use cortex_m::{asm, Peripherals}; -//! use rt::ExceptionFrame; -//! -//! entry!(main); -//! -//! fn main() -> ! { -//! let mut p = Peripherals::take().unwrap(); -//! let stim = &mut p.ITM.stim[0]; -//! -//! iprintln!(stim, "Hello, world!"); -//! -//! loop { -//! asm::bkpt(); -//! } -//! } -//! -//! // define the hard fault handler -//! exception!(HardFault, hard_fault); -//! -//! fn hard_fault(ef: &ExceptionFrame) -> ! { -//! panic!("HardFault at {:#?}", ef); -//! } -//! -//! // define the default exception handler -//! exception!(*, default_handler); -//! -//! fn default_handler(irqn: i16) { -//! panic!("Unhandled exception (IRQn = {})", irqn); -//! } -//! ``` -// Auto-generated. Do not modify. diff --git a/src/examples/_3_panic.rs b/src/examples/_3_panic.rs deleted file mode 100644 index 4d6a7dd..0000000 --- a/src/examples/_3_panic.rs +++ /dev/null @@ -1,47 +0,0 @@ -//! Changing the panic handler -//! -//! The easiest way to change the panic handler is to use a different [panic handler crate][0]. -//! -//! [0]: https://crates.io/keywords/panic-impl -//! -//! --- -//! -//! ``` -//! -//! #![no_main] -//! #![no_std] -//! -//! #[macro_use] -//! extern crate cortex_m_rt as rt; -//! -//! // Pick one of these two panic handlers: -//! -//! // Reports panic messages to the host stderr using semihosting -//! extern crate panic_semihosting; -//! -//! // Logs panic messages using the ITM (Instrumentation Trace Macrocell) -//! // extern crate panic_itm; -//! -//! use rt::ExceptionFrame; -//! -//! entry!(main); -//! -//! fn main() -> ! { -//! panic!("Oops") -//! } -//! -//! // define the hard fault handler -//! exception!(HardFault, hard_fault); -//! -//! fn hard_fault(ef: &ExceptionFrame) -> ! { -//! panic!("HardFault at {:#?}", ef); -//! } -//! -//! // define the default exception handler -//! exception!(*, default_handler); -//! -//! fn default_handler(irqn: i16) { -//! panic!("Unhandled exception (IRQn = {})", irqn); -//! } -//! ``` -// Auto-generated. Do not modify. diff --git a/src/examples/_4_crash.rs b/src/examples/_4_crash.rs deleted file mode 100644 index f3957d1..0000000 --- a/src/examples/_4_crash.rs +++ /dev/null @@ -1,118 +0,0 @@ -//! Debugging a crash (exception) -//! -//! Most crash conditions trigger a hard fault exception, whose handler is defined via -//! `exception!(HardFault, ..)`. The `HardFault` handler has access to the exception frame, a -//! snapshot of the CPU registers at the moment of the exception. -//! -//! This program crashes and the `HardFault` handler prints to the console the contents of the -//! `ExceptionFrame` and then triggers a breakpoint. From that breakpoint one can see the backtrace -//! that led to the exception. -//! -//! ``` text -//! (gdb) continue -//! Program received signal SIGTRAP, Trace/breakpoint trap. -//! __bkpt () at asm/bkpt.s:3 -//! 3 bkpt -//! -//! (gdb) backtrace -//! #0 __bkpt () at asm/bkpt.s:3 -//! #1 0x080030b4 in cortex_m::asm::bkpt () at $$/cortex-m-0.5.0/src/asm.rs:19 -//! #2 rust_begin_unwind (args=..., file=..., line=99, col=5) at $$/panic-semihosting-0.2.0/src/lib.rs:87 -//! #3 0x08001d06 in core::panicking::panic_fmt () at libcore/panicking.rs:71 -//! #4 0x080004a6 in crash::hard_fault (ef=0x20004fa0) at examples/crash.rs:99 -//! #5 0x08000548 in UserHardFault (ef=0x20004fa0) at :10 -//! #6 0x0800093a in HardFault () at asm.s:5 -//! Backtrace stopped: previous frame identical to this frame (corrupt stack?) -//! ``` -//! -//! In the console output one will find the state of the Program Counter (PC) register at the time -//! of the exception. -//! -//! ``` text -//! panicked at 'HardFault at ExceptionFrame { -//! r0: 0x2fffffff, -//! r1: 0x2fffffff, -//! r2: 0x080051d4, -//! r3: 0x080051d4, -//! r12: 0x20000000, -//! lr: 0x08000435, -//! pc: 0x08000ab6, -//! xpsr: 0x61000000 -//! }', examples/crash.rs:106:5 -//! ``` -//! -//! This register contains the address of the instruction that caused the exception. In GDB one can -//! disassemble the program around this address to observe the instruction that caused the -//! exception. -//! -//! ``` text -//! (gdb) disassemble/m 0x08000ab6 -//! Dump of assembler code for function core::ptr::read_volatile: -//! 451 pub unsafe fn read_volatile(src: *const T) -> T { -//! 0x08000aae <+0>: sub sp, #16 -//! 0x08000ab0 <+2>: mov r1, r0 -//! 0x08000ab2 <+4>: str r0, [sp, #8] -//! -//! 452 intrinsics::volatile_load(src) -//! 0x08000ab4 <+6>: ldr r0, [sp, #8] -//! -> 0x08000ab6 <+8>: ldr r0, [r0, #0] -//! 0x08000ab8 <+10>: str r0, [sp, #12] -//! 0x08000aba <+12>: ldr r0, [sp, #12] -//! 0x08000abc <+14>: str r1, [sp, #4] -//! 0x08000abe <+16>: str r0, [sp, #0] -//! 0x08000ac0 <+18>: b.n 0x8000ac2 -//! -//! 453 } -//! 0x08000ac2 <+20>: ldr r0, [sp, #0] -//! 0x08000ac4 <+22>: add sp, #16 -//! 0x08000ac6 <+24>: bx lr -//! -//! End of assembler dump. -//! ``` -//! -//! `ldr r0, [r0, #0]` caused the exception. This instruction tried to load (read) a 32-bit word -//! from the address stored in the register `r0`. Looking again at the contents of `ExceptionFrame` -//! we see that the `r0` contained the address `0x2FFF_FFFF` when this instruction was executed. -//! -//! --- -//! -//! ``` -//! -//! #![no_main] -//! #![no_std] -//! -//! extern crate cortex_m; -//! #[macro_use] -//! extern crate cortex_m_rt as rt; -//! extern crate panic_semihosting; -//! -//! use core::ptr; -//! -//! use rt::ExceptionFrame; -//! -//! entry!(main); -//! -//! fn main() -> ! { -//! unsafe { -//! // read an address outside of the RAM region; causes a HardFault exception -//! ptr::read_volatile(0x2FFF_FFFF as *const u32); -//! } -//! -//! loop {} -//! } -//! -//! // define the hard fault handler -//! exception!(HardFault, hard_fault); -//! -//! fn hard_fault(ef: &ExceptionFrame) -> ! { -//! panic!("HardFault at {:#?}", ef); -//! } -//! -//! // define the default exception handler -//! exception!(*, default_handler); -//! -//! fn default_handler(irqn: i16) { -//! panic!("Unhandled exception (IRQn = {})", irqn); -//! } -//! ``` -// Auto-generated. Do not modify. diff --git a/src/examples/_5_exception.rs b/src/examples/_5_exception.rs deleted file mode 100644 index f2a65f3..0000000 --- a/src/examples/_5_exception.rs +++ /dev/null @@ -1,68 +0,0 @@ -//! Overriding an exception handler -//! -//! You can override an exception handler using the [`exception!`][1] macro. -//! -//! [1]: https://docs.rs/cortex-m-rt/0.5.0/cortex_m_rt/macro.exception.html -//! -//! --- -//! -//! ``` -//! -//! #![deny(unsafe_code)] -//! #![no_main] -//! #![no_std] -//! -//! extern crate cortex_m; -//! #[macro_use] -//! extern crate cortex_m_rt as rt; -//! extern crate cortex_m_semihosting as sh; -//! extern crate panic_semihosting; -//! -//! use core::fmt::Write; -//! -//! use cortex_m::peripheral::syst::SystClkSource; -//! use cortex_m::Peripherals; -//! use rt::ExceptionFrame; -//! use sh::hio::{self, HStdout}; -//! -//! entry!(main); -//! -//! fn main() -> ! { -//! let p = Peripherals::take().unwrap(); -//! let mut syst = p.SYST; -//! -//! // configures the system timer to trigger a SysTick exception every second -//! syst.set_clock_source(SystClkSource::Core); -//! syst.set_reload(8_000_000); // period = 1s -//! syst.enable_counter(); -//! syst.enable_interrupt(); -//! -//! loop {} -//! } -//! -//! // try commenting out this line: you'll end in `default_handler` instead of in `sys_tick` -//! exception!(SysTick, sys_tick, state: Option = None); -//! -//! fn sys_tick(state: &mut Option) { -//! if state.is_none() { -//! *state = Some(hio::hstdout().unwrap()); -//! } -//! -//! if let Some(hstdout) = state.as_mut() { -//! hstdout.write_str(".").unwrap(); -//! } -//! } -//! -//! exception!(HardFault, hard_fault); -//! -//! fn hard_fault(ef: &ExceptionFrame) -> ! { -//! panic!("HardFault at {:#?}", ef); -//! } -//! -//! exception!(*, default_handler); -//! -//! fn default_handler(irqn: i16) { -//! panic!("Unhandled exception (IRQn = {})", irqn); -//! } -//! ``` -// Auto-generated. Do not modify. diff --git a/src/examples/_6_allocator.rs b/src/examples/_6_allocator.rs deleted file mode 100644 index c7bddcc..0000000 --- a/src/examples/_6_allocator.rs +++ /dev/null @@ -1,79 +0,0 @@ -//! How to use the heap and a dynamic memory allocator -//! -//! This example depends on the alloc-cortex-m crate so you'll have to add it to your Cargo.toml: -//! -//! ``` text -//! # or edit the Cargo.toml file manually -//! $ cargo add alloc-cortex-m -//! ``` -//! -//! --- -//! -//! ``` -//! -//! #![feature(alloc)] -//! #![feature(global_allocator)] -//! #![feature(lang_items)] -//! #![no_main] -//! #![no_std] -//! -//! // This is the allocator crate; you can use a different one -//! extern crate alloc_cortex_m; -//! #[macro_use] -//! extern crate alloc; -//! extern crate cortex_m; -//! #[macro_use] -//! extern crate cortex_m_rt as rt; -//! extern crate cortex_m_semihosting as sh; -//! extern crate panic_semihosting; -//! -//! use core::fmt::Write; -//! -//! use alloc_cortex_m::CortexMHeap; -//! use cortex_m::asm; -//! use rt::ExceptionFrame; -//! use sh::hio; -//! -//! // this is the allocator the application will use -//! #[global_allocator] -//! static ALLOCATOR: CortexMHeap = CortexMHeap::empty(); -//! -//! const HEAP_SIZE: usize = 1024; // in bytes -//! -//! entry!(main); -//! -//! fn main() -> ! { -//! // Initialize the allocator BEFORE you use it -//! unsafe { ALLOCATOR.init(rt::heap_start() as usize, HEAP_SIZE) } -//! -//! // Growable array allocated on the heap -//! let xs = vec![0, 1, 2]; -//! -//! let mut stdout = hio::hstdout().unwrap(); -//! writeln!(stdout, "{:?}", xs).unwrap(); -//! -//! loop {} -//! } -//! -//! // define what happens in an Out Of Memory (OOM) condition -//! #[lang = "oom"] -//! #[no_mangle] -//! pub fn rust_oom() -> ! { -//! asm::bkpt(); -//! -//! loop {} -//! } -//! -//! exception!(HardFault, hard_fault); -//! -//! fn hard_fault(ef: &ExceptionFrame) -> ! { -//! panic!("HardFault at {:#?}", ef); -//! } -//! -//! exception!(*, default_handler); -//! -//! fn default_handler(irqn: i16) { -//! panic!("Unhandled exception (IRQn = {})", irqn); -//! } -//! ``` -// Auto-generated. Do not modify. diff --git a/src/examples/_7_device.rs b/src/examples/_7_device.rs deleted file mode 100644 index 7564284..0000000 --- a/src/examples/_7_device.rs +++ /dev/null @@ -1,93 +0,0 @@ -//! Using a device crate -//! -//! Crates generated using [`svd2rust`] are referred to as device crates. These crates provide an -//! API to access the peripherals of a device. -//! -//! [`svd2rust`]: https://crates.io/crates/svd2rust -//! -//! Device crates also provide an `interrupt!` macro (behind the "rt" feature) to register interrupt -//! handlers. -//! -//! This example depends on the [`stm32f103xx`] crate so you'll have to add it to your Cargo.toml. -//! -//! [`stm32f103xx`]: https://crates.io/crates/stm32f103xx -//! -//! ``` -//! $ edit Cargo.toml && tail $_ -//! [dependencies.stm32f103xx] -//! features = ["rt"] -//! version = "0.10.0" -//! ``` -//! -//! --- -//! -//! ``` -//! -//! #![no_main] -//! #![no_std] -//! -//! extern crate cortex_m; -//! #[macro_use] -//! extern crate cortex_m_rt as rt; -//! extern crate cortex_m_semihosting as sh; -//! #[macro_use] -//! extern crate stm32f103xx; -//! extern crate panic_semihosting; -//! -//! use core::fmt::Write; -//! -//! use cortex_m::peripheral::syst::SystClkSource; -//! use rt::ExceptionFrame; -//! use sh::hio::{self, HStdout}; -//! use stm32f103xx::Interrupt; -//! -//! entry!(main); -//! -//! fn main() -> ! { -//! let p = cortex_m::Peripherals::take().unwrap(); -//! -//! let mut syst = p.SYST; -//! let mut nvic = p.NVIC; -//! -//! nvic.enable(Interrupt::EXTI0); -//! -//! // configure the system timer to wrap around every second -//! syst.set_clock_source(SystClkSource::Core); -//! syst.set_reload(8_000_000); // 1s -//! syst.enable_counter(); -//! -//! loop { -//! // busy wait until the timer wraps around -//! while !syst.has_wrapped() {} -//! -//! // trigger the `EXTI0` interrupt -//! nvic.set_pending(Interrupt::EXTI0); -//! } -//! } -//! -//! // try commenting out this line: you'll end in `default_handler` instead of in `exti0` -//! interrupt!(EXTI0, exti0, state: Option = None); -//! -//! fn exti0(state: &mut Option) { -//! if state.is_none() { -//! *state = Some(hio::hstdout().unwrap()); -//! } -//! -//! if let Some(hstdout) = state.as_mut() { -//! hstdout.write_str(".").unwrap(); -//! } -//! } -//! -//! exception!(HardFault, hard_fault); -//! -//! fn hard_fault(ef: &ExceptionFrame) -> ! { -//! panic!("HardFault at {:#?}", ef); -//! } -//! -//! exception!(*, default_handler); -//! -//! fn default_handler(irqn: i16) { -//! panic!("Unhandled exception (IRQn = {})", irqn); -//! } -//! ``` -// Auto-generated. Do not modify. diff --git a/src/examples/mod.rs b/src/examples/mod.rs deleted file mode 100644 index 0358d78..0000000 --- a/src/examples/mod.rs +++ /dev/null @@ -1,10 +0,0 @@ -//! Examples sorted in increasing degree of complexity -// Auto-generated. Do not modify. -pub mod _0_minimal; -pub mod _1_hello; -pub mod _2_itm; -pub mod _3_panic; -pub mod _4_crash; -pub mod _5_exception; -pub mod _6_allocator; -pub mod _7_device; diff --git a/src/lib.rs b/src/lib.rs deleted file mode 100644 index f85c4c6..0000000 --- a/src/lib.rs +++ /dev/null @@ -1,342 +0,0 @@ -//! A template for building applications for ARM Cortex-M microcontrollers -//! -//! # Dependencies -//! -//! - Nightly Rust toolchain from 2018-08-28 or newer: `rustup default nightly` -//! - Cargo `clone` subcommand: `cargo install cargo-clone` -//! - GDB: `sudo apt-get install gdb-arm-none-eabi` (on Ubuntu) -//! - OpenOCD: `sudo apt-get install OpenOCD` (on Ubuntu) -//! - [Optional] Cargo `add` subcommand: `cargo install cargo-edit` -//! -//! # Usage -//! -//! 0) Figure out the cross compilation *target* to use. -//! -//! - Use `thumbv6m-none-eabi` for ARM Cortex-M0 and Cortex-M0+ -//! - Use `thumbv7m-none-eabi` for ARM Cortex-M3 -//! - Use `thumbv7em-none-eabi` for ARM Cortex-M4 and Cortex-M7 (*no* FPU support) -//! - Use `thumbv7em-none-eabihf` for ARM Cortex-M4**F** and Cortex-M7**F** (*with* FPU support) -//! -//! 1) Install the `rust-std` component for your target, if you haven't done so already -//! -//! ``` console -//! $ rustup target add thumbv7em-none-eabihf -//! ``` -//! -//! 2) Clone this crate -//! -//! ``` text -//! $ cargo clone cortex-m-quickstart --vers 0.3.4 -//! ``` -//! -//! 3) Change the crate name, author and version -//! -//! ``` text -//! $ edit Cargo.toml && head $_ -//! [package] -//! authors = ["Jorge Aparicio "] -//! name = "demo" -//! version = "0.1.0" -//! ``` -//! -//! 4) Specify the memory layout of the target device -//! -//! **NOTE** board support crates sometimes provide this file for you (check the crate -//! documentation). If you are using one that does then remove *both* `memory.x` and `build.rs` from -//! the root of this crate. -//! -//! ``` text -//! $ cat >memory.x <<'EOF' -//! MEMORY -//! { -//! /* NOTE K = KiBi = 1024 bytes */ -//! FLASH : ORIGIN = 0x08000000, LENGTH = 256K -//! RAM : ORIGIN = 0x20000000, LENGTH = 40K -//! } -//! EOF -//! ``` -//! -//! 5) Optionally, set a default build target. This way you don't have to pass `--target` to each -//! Cargo invocation. -//! -//! ``` text -//! $ cat >>.cargo/config <<'EOF' -//! [build] -//! target = "thumbv7em-none-eabihf" -//! EOF -//! ``` -//! -//! 6) Optionally, depend on a device, HAL implementation or a board support crate. -//! -//! ``` text -//! $ # add a device crate, OR -//! $ cargo add stm32f30x -//! -//! $ # add a HAL implementation crate, OR -//! $ cargo add stm32f30x-hal -//! -//! $ # add a board support crate -//! $ cargo add f3 -//! ``` -//! -//! 7) Write the application or start from one of the examples -//! -//! ``` text -//! $ rm -r src/* && cp examples/hello.rs src/main.rs -//! ``` -//! -//! 8) Build the application -//! -//! ``` text -//! $ cargo build --release -//! -//! $ # sanity check -//! $ arm-none-eabi-readelf -A target/thumbv7em-none-eabihf/release/demo -//! Attribute Section: aeabi -//! File Attributes -//! Tag_conformance: "2.09" -//! Tag_CPU_arch: v7E-M -//! Tag_CPU_arch_profile: Microcontroller -//! Tag_THUMB_ISA_use: Thumb-2 -//! Tag_FP_arch: VFPv4-D16 -//! Tag_ABI_PCS_GOT_use: direct -//! Tag_ABI_FP_denormal: Needed -//! Tag_ABI_FP_exceptions: Needed -//! Tag_ABI_FP_number_model: IEEE 754 -//! Tag_ABI_align_needed: 8-byte -//! Tag_ABI_align_preserved: 8-byte, except leaf SP -//! Tag_ABI_HardFP_use: SP only -//! Tag_ABI_VFP_args: VFP registers -//! Tag_ABI_optimization_goals: Aggressive Speed -//! Tag_CPU_unaligned_access: v6 -//! Tag_FP_HP_extension: Allowed -//! Tag_ABI_FP_16bit_format: IEEE 754 -//! ``` -//! -//! 9) Flash and debug the program -//! -//! ``` text -//! $ # Launch OpenOCD on a terminal -//! $ openocd -f (..) -//! ``` -//! -//! ``` text -//! $ # Start a debug session in another terminal -//! $ arm-none-eabi-gdb target/thumbv7em-none-eabihf/release/demo -//! ``` -//! -//! Alternatively, you can use `cargo run` to build, flash and debug the program in a single step. -//! -//! ``` text -//! $ cargo run --example hello -//! > # drops you into a GDB session -//! ``` -//! -//! # Examples -//! -//! Check the [examples module][examples] -//! -//! [examples]: ./examples/index.html -//! -//! # Troubleshooting -//! -//! This section contains fixes for common errors encountered when the -//! `cortex-m-quickstart` template is misused. -//! -//! ## Used the standard `main` interface -//! -//! Error message: -//! -//! ``` text -//! $ cargo build -//! Compiling demo v0.1.0 (file:///home/japaric/tmp/demo) -//! -//! error: requires `start` lang_item -//! ``` -//! -//! Solution: Use `#![no_main]` and `entry!` as shown in the [examples]. -//! -//! ## Forgot to launch an OpenOCD instance -//! -//! Error message: -//! -//! ``` text -//! $ arm-none-eabi-gdb target/.. -//! Reading symbols from hello...done. -//! .gdbinit:1: Error in sourced command file: -//! :3333: Connection timed out. -//! ``` -//! -//! Solution: Launch OpenOCD on other terminal. See [Usage] section. -//! -//! [Usage]: ./index.html#usage -//! -//! ## Didn't modify the `memory.x` linker script -//! -//! Error message: -//! -//! ``` text -//! $ cargo build -//! Compiling demo v0.1.0 (file:///home/japaric/tmp/demo) -//! error: linking with `rust-lld` failed: exit code: 1 -//! | -//! = note: "rust-lld" "-flavor" "gnu" "-L" (..) -//! (..) -//! = note: rust-lld: error: section '.vector_table' will not fit in region 'FLASH': overflowed by X bytes -//! rust-lld: error: section '.vector_table' will not fit in region 'FLASH': overflowed by Y bytes -//! (..) -//! ``` -//! -//! Solution: Specify your device memory layout in the `memory.x` linker script. See [Usage] -//! section. -//! -//! ## Didn't set a default build target and forgot to pass `--target` to Cargo -//! -//! Error message: -//! -//! ``` text -//! $ cargo build -//! (..) -//! error: language item required, but not found: `eh_personality` -//! -//! error: aborting due to previous error -//! ``` -//! -//! Solution: Set a default build target in the `.cargo/config` file (see [Usage] section), or call -//! Cargo with `--target` flag: `cargo build --target thumbv7em-none-eabi`. -//! -//! ## Overwrote the original `.cargo/config` file -//! -//! You won't get an error message but the output binary will be empty -//! -//! ``` text -//! $ cargo build && echo OK -//! OK -//! -//! $ size target/thumbv7m-none-eabi/debug/app -//! text data bss dec hex filename -//! 0 0 0 0 0 target/thumbv7m-none-eabi/debug/app -//! ``` -//! -//! Solution: You probably overwrote the original `.cargo/config` instead of appending the default -//! build target (e.g. `cat >` instead of `cat >>`). The less error prone way to fix this is to -//! remove the `.cargo` directory, clone a new copy of the template and then copy the `.cargo` -//! directory from that fresh template into your current project. Don't forget to *append* the -//! default build target to `.cargo/config`. -//! -//! ## Called OpenOCD with wrong arguments -//! -//! Error message: -//! -//! ``` text -//! $ openocd -f .. -//! (..) -//! Error: open failed -//! in procedure 'init' -//! in procedure 'ocd_bouncer' -//! ``` -//! -//! Solution: Correct the OpenOCD arguments. Check the `/usr/share/openocd/scripts` directory (exact -//! location varies per distribution / OS) for a list of scripts that can be used. -//! -//! ## Forgot to install the `rust-std` component -//! -//! Error message: -//! -//! ``` text -//! $ cargo build -//! error[E0463]: can't find crate for `core` -//! | -//! = note: the `thumbv7m-none-eabi` target may not be installed -//! ``` -//! -//! Solution: call `rustup target add thumbv7m-none-eabi` but with the name of your target -//! -//! ## Used an old nightly -//! -//! Error message: -//! -//! ``` text -//! $ cargo build -//! Compiling cortex-m-rt v0.2.0 -//! error[E0463]: can't find crate for `core` -//! | -//! = note: the `thumbv7em-none-eabihf` target may not be installed -//! -//! error: aborting due to previous error -//! ``` -//! -//! Solution: Use a more recent nightly -//! -//! ## Used the stable toolchain -//! -//! Error message: -//! -//! ``` text -//! $ cargo build -//! error[E0463]: can't find crate for `core` -//! | -//! = note: the `thumbv7em-none-eabihf` target may not be installed -//! ``` -//! -//! Solution: We are not there yet! Switch to the nightly toolchain with `rustup default nightly`. -//! -//! ## Used `gdb` instead of `arm-none-eabi-gdb` -//! -//! Error message: -//! -//! ``` text -//! $ gdb target/.. -//! Reading symbols from hello...done. -//! warning: Architecture rejected target-supplied description -//! warning: Cannot convert floating-point register value to .. -//! value has been optimized out -//! Cannot write the dashboard -//! Traceback (most recent call last): -//! File "", line 353, in render -//! File "", line 846, in lines -//! gdb.error: Frame is invalid. -//! 0x00000000 in ?? () -//! semihosting is enabled -//! Loading section .text, size 0xd88 lma 0x8000000 -//! Start address 0x8000000, load size 3464 -//! .gdbinit:6: Error in sourced command file: -//! Remote connection closed -//! ``` -//! -//! Solution: Use `arm-none-eabi-gdb target/..` -//! -//! # Used a named piped for `itm.fifo` -//! -//! Error message: -//! -//! ``` text -//! $ cargo run [--example ..] -//! -//! Reading symbols from target/thumbv7em-none-eabihf/debug/cortex-m-quickstart...done. -//! cortex_m_rt::reset_handler () -//! at $REGISTRY/cortex-m-rt-0.3.12/src/lib.rs:330 -//! 330 unsafe extern "C" fn reset_handler() -> ! { -//! semihosting is enabled -//! Ignoring packet error, continuing... -//! Ignoring packet error, continuing... -//! ``` -//! -//! Note that when you reach this point OpenOCD will become unresponsive and you'll have to kill it -//! and start a new OpenOCD process before you can invoke `cargo run` / start GDB. -//! -//! Cause: You uncommented the `monitor tpiu ..` line in `.gdbinit` and are using a named pipe to -//! receive the ITM data (i.e. you ran `mkfifo itm.fifo`). This error occurs when `itmdump -f -//! itm.fifo` (or equivalent, e.g. `cat itm.fifo`) is not running. -//! -//! Solution: Run `itmdump -f itm.fifo` (or equivalently `cat itm.fifo`) *before* invoking `cargo -//! run` / starting GDB. Note that sometimes `itmdump` will exit when the GDB session ends. In that -//! case you'll have to run `itmdump` before you start the next GDB session. -//! -//! Alternative solution: Use a plain text file instead of a named pipe. In this scenario you omit -//! the `mkfifo itm.dump` command. You can use `itmdump`'s *follow* mode (-F) to get named pipe like -//! output. - -#![no_std] - -pub mod examples; diff --git a/src/main.rs b/src/main.rs new file mode 100644 index 0000000..23646c3 --- /dev/null +++ b/src/main.rs @@ -0,0 +1,19 @@ +#![no_main] +#![no_std] + +extern crate cortex_m; +#[macro_use] +extern crate cortex_m_rt; + +// TODO pick a panicking behavior +// extern crate panic_abort; // requires nightly +// extern crate panic_itm; // requires ITM support +// extern crate panic_semihosting; // requires a debugger + +entry!(main); + +fn main() -> ! { + loop { + // TODO your code goes here + } +} From 7faeedd95a8e11ecbca57245af82a616b604fb06 Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Thu, 6 Sep 2018 16:27:51 +0200 Subject: [PATCH 2/9] move out most of text see https://github.com/rust-embedded/book/pull/20 --- .cargo/config | 10 +- Cargo.toml | 22 +- README.md | 464 ++++-------------------------------------- examples/allocator.rs | 36 +--- examples/crash.rs | 26 +-- examples/device.rs | 30 +-- examples/exception.rs | 41 ++-- examples/hello.rs | 18 +- examples/itm.rs | 31 +-- examples/minimal.rs | 40 ---- examples/panic.rs | 34 +--- memory.x | 5 +- openocd.gdb | 8 +- src/main.rs | 18 +- 14 files changed, 126 insertions(+), 657 deletions(-) delete mode 100644 examples/minimal.rs diff --git a/.cargo/config b/.cargo/config index 01b30cb..b9bbec9 100644 --- a/.cargo/config +++ b/.cargo/config @@ -1,4 +1,12 @@ +[target.thumbv7m-none-eabi] +# uncomment this to make `cargo run` execute programs on QEMU +# runner = "qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel" + [target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# uncomment this to make `cargo run` start a GDB session +# NOTE: you may need to change `arm-none-eabi-gdb` +# runner = "arm-none-eabi-gdb -x openocd.gdb" + rustflags = [ # LLD (shipped with the Rust toolchain) is used as the default linker "-C", "link-arg=-Tlink.x", @@ -20,4 +28,4 @@ rustflags = [ # target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ target = "thumbv7m-none-eabi" # Cortex-M3 # target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) -# target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) \ No newline at end of file +# target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) diff --git a/Cargo.toml b/Cargo.toml index e4e5d8b..ebc43d1 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,13 +1,17 @@ +# TODO remove +cargo-features = ["edition"] + [package] +edition = "2018" authors = ["{{authors}}"] name = "{{project-name}}" version = "0.1.0" [dependencies] -cortex-m = "0.5.6" -cortex-m-rt = "0.5.3" +cortex-m = "0.5.7" +cortex-m-rt = "0.6.1" cortex-m-semihosting = "0.3.1" -panic-semihosting = "0.4.0" +panic-halt = "0.1.3" # Uncomment for the panic example. # panic-itm = "0.3.0" @@ -16,11 +20,17 @@ panic-semihosting = "0.4.0" # alloc-cortex-m = "0.3.5" # Uncomment for the device example. -# [dependencies.stm32f103xx] +# [dependencies.stm32f30x] # features = ["rt"] -# version = "0.10.0" +# version = "0.7.1" + +# this lets you use `cargo fix`! +[[bin]] +name = "{{project-name}}" +test = false +bench = false [profile.release] codegen-units = 1 # better optimizations -debug = true +debug = true # symbols are nice and they don't increase the size on Flash lto = true # better optimizations diff --git a/README.md b/README.md index 3ce896f..14c6437 100644 --- a/README.md +++ b/README.md @@ -4,14 +4,14 @@ This project is developed and maintained by the [Cortex-M team][team]. -# [Documentation](https://rust-embedded.github.io/cortex-m-quickstart/cortex_m_quickstart) - ## Dependencies To build embedded programs using this template you'll need: -- Nightly Rust toolchain from 2018-08-28 or newer: `rustup default nightly` +- Rust 1.30-beta or nightly. `rustup default beta` + - The `cargo generate` subcommand: `cargo install cargo-generate` + - `rust-std` components (pre-compiled `core` crate) for the ARM Cortex-M targets. Run: @@ -19,337 +19,56 @@ To build embedded programs using this template you'll need: $ rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabi thumbv7em-none-eabihf ``` -## Non-dependencies +## Using this template -This section list programs that are *not* required to build embedded programs -but are useful or necessary for embedded development. +**NOTE**: This is the very short version that only covers building programs. For +the long version check [the embedded Rust book][book]. -To flash (put the firmware on the target device) and debug embedded programs -you'll need these additional programs: +[book]: https://rust-embedded.github.io/book/blinky/blinky.html - - +0. Before we begin you need to identify some characteristics of the target + device as these will be used to configure the project: -- GDB with ARM support or LLDB, for debugging. -- QEMU with ARM support, for running embedded programs on the build machine. -- OpenOCD and similar, which make debugging possible at all. +- The ARM core. e.g. Cortex-M3. -To inspect the produced binaries you'll want [`cargo-binutils`]. - -[`cargo-binutils`]: https://crates.io/crates/cargo-binutils - -## Usage - -### First timers - -#### Building - -If you are already familiar with the process of building and debugging embedded -Rust programs feel free to skip this section! - -To get you familiar with building and debugging embedded Rust programs we'll use -the template with its default values to build a program for the LM3S6965, a -microcontroller with a Cortex-M3 core that QEMU can emulate. - -In this section we'll use a debugger (GDB or LLDB) and QEMU. Be sure to have -them installed! - -1. Initialize the template - -``` console -$ cargo generate --git https://github.com/rust-embedded/cortex-m-quickstart -``` - -2. Build the example "Hello, world!" program - -``` rust -// example/hello.rs -#![no_main] -#![no_std] - -#[macro_use] -extern crate cortex_m_rt; -extern crate cortex_m_semihosting as sh; -extern crate panic_semihosting; - -use core::fmt::Write; - -use sh::hio; - -entry!(main); - -fn main() -> ! { - let mut stdout = hio::hstdout().unwrap(); - writeln!(stdout, "Hello, world!").unwrap(); - - loop {} -} -``` - -We'll cross compile the program for the `thumbv7m-none-eabi` target. This target -covers Cortex-M3 devices like the one we are targeting. - -``` console -$ cargo build --target thumbv7m-none-eabi --example hello -``` -You'll find the output binary in the following path: -`target/thumbv7m-none-eabi/debug/examples/hello`. The output is an ELF file. - -If you have `file` installed you can print the file type of the output to -confirm it's an ELF file: - -``` -$ ( cd target/thumbv7m-none-eabi/debug/examples && file hello ) -hello: ELF 32-bit LSB executable, ARM, EABI5 version 1 (SYSV), statically linked, with debug_info, not stripped -``` - -If you have `cargo-binutils` installed you can look at the ELF header of the -output: - -> NOTE `cargo-readelf` will be available in a *future* release of binutils -> (v0.1.3) - -``` console -$ cargo readelf --example hello -- --file-headers -``` - -``` text -ELF Header: - Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 - Class: ELF32 - Data: 2's complement, little endian - Version: 1 (current) - OS/ABI: UNIX - System V - ABI Version: 0x0 - Type: EXEC (Executable file) - Machine: ARM - Version: 0x1 - Entry point address: 0x23A3 - Start of program headers: 52 (bytes into file) - Start of section headers: 673340 (bytes into file) - Flags: 0x5000200 - Size of this header: 52 (bytes) - Size of program headers: 32 (bytes) - Number of program headers: 2 - Size of section headers: 40 (bytes) - Number of section headers: 21 - Section header string table index: 19 -``` - -If you look at the bottom of the Cargo configuration file (`.cargo/config`) -you'll see that the `thumbv7m-none-eabi` target has been set as the default -compilation target. This means that you do *not* need to pass the `--target` -flag to cross compile because it's already implied. So: - -``` console -$ cargo build --example hello -``` - -Does the same as before. - -3. There's no step 3! Your build is done, but for completeness let's look at how - to run this program on QEMU. - -#### Running the program on QEMU - -Execute this command and you are done. - -``` console -$ qemu-system-arm \ - -cpu cortex-m3 \ - -machine lm3s6965evb \ - -nographic \ - -semihosting-config enable=on,target=native \ - -kernel target/thumbv7m-none-eabi/debug/examples/hello -Hello, world! -``` - -The above command will block the terminal because the `hello` program never -ends! To terminate QEMU input this in your terminal: `Ctrl+A`, followed by `X`. - -Let me break down that long command for you: - -- `qemu-system-arm`. This is the QEMU emulator. There are a few variants of - these QEMU binaries; this one does full *system* emulation of *ARM* machines - -- hence the name. - -- `-cpu cortex-m3`. This tells QEMU to emulate a Cortex-M3 CPU. Specifying the - CPU model lets us catch some miscompilation errors: for example, running a - program compiled for the Cortex-M4F, which has a hardware FPU, will make QEMU - error during its execution. - -- `-machine lm3s6965evb`. This tells QEMU to emulate the LM3S6965EVB, a - evaluation board that contains a LM3S6965 microcontroller. - -- `-nographic`. This tells QEMU to not launch its GUI. - -- `-semihosting-config (..)`. This tells QEMU to enable semihosting. Semihosting - lets the emulated device, among other things, use the host stdout, stderr and - stdin and create files on the host. - -- `-kernel $file`. This tells QEMU which binary to flash (kind of) and run on - the emulated machine. - -#### Debugging - -First, we launch a QEMU instance: - -``` console -$ qemu-system-arm \ - -cpu cortex-m3 \ - -machine lm3s6965evb \ - -nographic \ - -semihosting-config enable=on,target=native \ - -gdb tcp::3333 \ - -S \ - -kernel target/thumbv7m-none-eabi/debug/examples/hello -``` - -Note that this command won't print anything to the console but will block the -terminal. We have passed two extra flags this time: - -- `-gdb tcp::3333`. This tells QEMU to wait for a GDB connection on TCP - port 3333. - -- `-S`. This tells QEMU to freeze the machine at startup. Without this the - program would have reached the end of `main` before we had a chance to launch - the debugger! - -Next, we start up LLDB in another terminal: - -``` console -$ lldb target/thumbv7m-none-eabi/debug/examples/hello -``` - -And tell it to connect to the GDB server that QEMU created: - -``` console -(lldb) gdb-remote 3333 -Process 1 stopped -* thread #1, stop reason = signal SIGTRAP - frame #0: 0x000023a2 hello`Reset at lib.rs:475 - 472 - 473 #[doc(hidden)] - 474 #[no_mangle] --> 475 pub unsafe extern "C" fn Reset() -> ! { - 476 extern "C" { - 477 // This symbol will be provided by the user via the `entry!` macro - 478 fn main() -> !; -``` - -You'll see that the process is halted and that the program counter is pointing -to a function named `Reset`. That is the reset handler: what Cortex-M cores -execute upon booting. - -This reset handler will eventually call our `main` function. Let's skip all the -way there using a breakpoint and the `continue` command: - -``` console -(lldb) breakpoint set -name hello::main -Breakpoint 1: where = hello`hello::main::h9cf19a1378cbd1b8 + 2 at hello.rs:20, address = 0x000006a8 - -(lldb) continue -Process 1 resuming -Process 1 stopped -* thread #1, stop reason = breakpoint 1.1 - frame #0: 0x000006a8 hello`hello::main::h9cf19a1378cbd1b8 at hello.rs:20 - 17 entry!(main); - 18 - 19 fn main() -> ! { --> 20 let mut stdout = hio::hstdout().unwrap(); - 21 writeln!(stdout, "Hello, world!").unwrap(); - 22 - 23 loop {} -``` - -We are now close to the code that prints "Hello, world!". Let's move the program -forward using the `next` command. - -``` console -(lldb) next -Process 1 stopped -* thread #1, stop reason = step over - frame #0: 0x000006be hello`hello::main::h9cf19a1378cbd1b8 at hello.rs:21 - 18 - 19 fn main() -> ! { - 20 let mut stdout = hio::hstdout().unwrap(); --> 21 writeln!(stdout, "Hello, world!").unwrap(); - 22 - 23 loop {} - 24 } - -(lldb) next -Process 1 stopped -* thread #1, stop reason = step over - frame #0: 0x000006f6 hello`hello::main::h9cf19a1378cbd1b8 at hello.rs:23 - 20 let mut stdout = hio::hstdout().unwrap(); - 21 writeln!(stdout, "Hello, world!").unwrap(); - 22 --> 23 loop {} - 24 } -``` - -At this point you should see "Hello, world!" printed on the terminal that's -running `qemu-system-arm`. - -``` console -$ qemu-system-arm (..) -Hello, world! -``` - -That's it! You can now exit `lldb`, which will also cause QEMU to terminate. - -``` -(lldb) exit -Quitting LLDB will kill one or more processes. Do you really want to proceed: [Y/n] y -``` - -### Not first timers - -#### Building - -This section explains how to configure this template to build programs for some -specific Cortex-M device. - -0. Before everything else, you need to know the characteristics of the target - device: - -- What's the ARM core? e.g. Cortex-M3. - -- Does the ARM core include an FPU? e.g. the Cortex-M4F does. +- Does the ARM core include an FPU? Cortex-M4**F** and Cortex-M7**F** cores do. - How much Flash memory and RAM does the target device has? e.g. 40 KB of RAM -- Where is Flash memory and RAM mapped in the address space? e.g. `0x2000_0000` - is common for RAM. +- Where are Flash memory and RAM mapped in the address space? e.g. RAM is + commonly located at address `0x2000_0000`. -You should be able to find this information in the data sheet and / or reference -manual of your device. +You can find this information in the data sheet or the reference manual of your +device. -As an example, we'll use the [STM32F303VCT6] microcontroller. This device has: +In this example we'll be using the STM32F3DISCOVERY. This board contains an +STM32F303VCT6 microcontroller. This microcontroller has: -[STM32F303VCT6]: https://www.st.com/en/microcontrollers/stm32f303vc.html +- A Cortex-M4F core that includes a single precision FPU -- a Cortex-M4F core that includes a single precision FPU +- 256 KB of Flash located at address 0x0800_0000. -- 256 KB of Flash located at address `0x0800_0000`. - -- 40 KB of RAM located at address `0x2000_0000`. (There's another RAM region but +- 40 KB of RAM located at address 0x2000_0000. (There's another RAM region but for simplicity we'll ignore it). -1. Initialize the template +1. Instantiate the template. ``` console $ cargo generate --git https://github.com/rust-embedded/cortex-m-quickstart + Project Name: app + Creating project called `app`... + Done! New project created /tmp/app + +$ cd app ``` -2. Set the default compilation target in `.cargo/config`. +2. Set a default compilation target. There are four options as mentioned at the + bottom of `.cargo/config`. For the STM32F303VCT6, which has a Cortex-M4F + core, we'll pick the `thumbv7em-none-eabihf` target. -For the STM32F303VCT6, we pick the `thumbv7em-none-eabihf` target as that covers -the Cortex-M4F core. ``` console -$ tail .cargo/config +$ tail -n6 .cargo/config ``` ``` toml @@ -361,138 +80,25 @@ $ tail .cargo/config target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) ``` -3. Enter the memory region information into `memory.x`. - -As we mentioned before the STM32F303VCT6 has 40 KB of RAM located at address -`0x2000_0000` and 256 KB of Flash memory located at address `0x0800_0000`. +3. Enter the memory region information into the `memory.x` file. ``` console $ cat memory.x -``` - -``` text +/* Linker script for the STM32F303VCT6 */ MEMORY { - /* NOTE K = KiBi = 1024 bytes */ + /* NOTE 1 K = 1 KiBi = 1024 bytes */ FLASH : ORIGIN = 0x08000000, LENGTH = 256K RAM : ORIGIN = 0x20000000, LENGTH = 40K } ``` -4. Build one of the examples: +4. Build the template application or one of the examples. ``` console -$ cargo build --example hello +$ cargo build ``` -You are done! You should be able to flash and run this example on your -device. - -#### Debugging - -Teaching you how to flash and debug this program on *your* device is out of -scope for this document due to the sheer variety of possible hardware / software -combinations. But the steps required to flash and debug this program on the -[STM32F3DISCOVERY] using OpenOCD are provided below as a reference. - -[STM32F3DISCOVERY]: https://www.st.com/en/evaluation-tools/stm32f3discovery.html - -On a terminal run `openocd` to connect to the ST-LINK on the discovery board. -Run this command from the root of the template; `openocd` will pick up the -`openocd.cfg` file which indicates which interface file and target file to use. - -``` console -$ cat openocd.cfg -``` - -``` text -source [find interface/stlink-v2-1.cfg] -source [find target/stm32f3x.cfg] -``` - -``` console -$ openocd -Open On-Chip Debugger 0.10.0 -Licensed under GNU GPL v2 -For bug reports, read - http://openocd.org/doc/doxygen/bugs.html -Info : auto-selecting first available session transport "hla_swd". To override use 'transport select '. -adapter speed: 1000 kHz -adapter_nsrst_delay: 100 -Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD -none separate -Info : Unable to match requested speed 1000 kHz, using 950 kHz -Info : Unable to match requested speed 1000 kHz, using 950 kHz -Info : clock speed 950 kHz -Info : STLINK v2 JTAG v27 API v2 SWIM v15 VID 0x0483 PID 0x374B -Info : using stlink api v2 -Info : Target voltage: 2.913879 -Info : stm32f3x.cpu: hardware has 6 breakpoints, 4 watchpoints -``` - -On another terminal run GDB, also from the root of the template. - -``` console -$ cat openocd.gdb -``` - -``` text -target remote :3333 - -# print demangled symbols -set print asm-demangle on - -# detect unhandled exceptions and hard faults -break DefaultHandler -break UserHardFault - -monitor arm semihosting enable - -load -``` - -``` console -$ arm-none-eabi-gdb -x openocd.gdb target/thumbv7em-none-eabihf/debug/examples/hello -(..) -Loading section .vector_table, size 0x400 lma 0x8000000 -Loading section .text, size 0x21dc lma 0x8000400 -Loading section .rodata, size 0x6a4 lma 0x80025e0 -Start address 0x800238c, load size 11392 -Transfer rate: 17 KB/sec, 3797 bytes/write. - -(gdb) list -470 #[no_mangle] -471 pub static __RESET_VECTOR: unsafe extern "C" fn() -> ! = Reset; -472 -473 #[doc(hidden)] -474 #[no_mangle] -475 pub unsafe extern "C" fn Reset() -> ! { -476 extern "C" { -477 // This symbol will be provided by the user via the `entry!` macro -478 fn main() -> !; -479 -``` - -The `openocd.gdb` script will connect GDB to OpenOCD and then flash the program -into the device. After that you can do a normal debugging session. - -If you `continue` the program past the semihosting write operation you'll see -"Hello, world" printed on the OpenOCD console. - -``` console -(gdb) continue -``` - -``` console -$ openocd -(..) -Hello, world! -``` - -## Next steps - -> TODO point the reader to embedded-hal, awesome-embedded-rust, etc. - # License Licensed under either of diff --git a/examples/allocator.rs b/examples/allocator.rs index 5e242c8..5594e3c 100644 --- a/examples/allocator.rs +++ b/examples/allocator.rs @@ -11,27 +11,19 @@ #![feature(alloc)] #![feature(alloc_error_handler)] -#![feature(lang_items)] #![no_main] #![no_std] -// This is the allocator crate; you can use a different one -extern crate alloc_cortex_m; -#[macro_use] -extern crate alloc; -extern crate cortex_m; -#[macro_use] -extern crate cortex_m_rt as rt; -extern crate cortex_m_semihosting as sh; -extern crate panic_semihosting; +extern crate panic_halt; use core::alloc::Layout; use core::fmt::Write; +use alloc::vec; use alloc_cortex_m::CortexMHeap; use cortex_m::asm; -use rt::ExceptionFrame; -use sh::hio; +use cortex_m_rt::entry; +use cortex_m_semihosting::hio; // this is the allocator the application will use #[global_allocator] @@ -39,11 +31,10 @@ static ALLOCATOR: CortexMHeap = CortexMHeap::empty(); const HEAP_SIZE: usize = 1024; // in bytes -entry!(main); - +#[entry] fn main() -> ! { // Initialize the allocator BEFORE you use it - unsafe { ALLOCATOR.init(rt::heap_start() as usize, HEAP_SIZE) } + unsafe { ALLOCATOR.init(cortex_m_rt::heap_start() as usize, HEAP_SIZE) } // Growable array allocated on the heap let xs = vec![0, 1, 2]; @@ -56,21 +47,8 @@ fn main() -> ! { // define what happens in an Out Of Memory (OOM) condition #[alloc_error_handler] -#[no_mangle] -pub fn alloc_error(_layout: Layout) -> ! { +fn alloc_error(_layout: Layout) -> ! { asm::bkpt(); loop {} } - -exception!(HardFault, hard_fault); - -fn hard_fault(ef: &ExceptionFrame) -> ! { - panic!("HardFault at {:#?}", ef); -} - -exception!(*, default_handler); - -fn default_handler(irqn: i16) { - panic!("Unhandled exception (IRQn = {})", irqn); -} diff --git a/examples/crash.rs b/examples/crash.rs index fafe436..fecde7a 100644 --- a/examples/crash.rs +++ b/examples/crash.rs @@ -79,36 +79,18 @@ #![no_main] #![no_std] -extern crate cortex_m; -#[macro_use] -extern crate cortex_m_rt as rt; -extern crate panic_semihosting; +extern crate panic_halt; use core::ptr; -use rt::ExceptionFrame; - -entry!(main); +use cortex_m_rt::entry; +#[entry] fn main() -> ! { unsafe { - // read an address outside of the RAM region; causes a HardFault exception + // read an address outside of the RAM region; this causes a HardFault exception ptr::read_volatile(0x2FFF_FFFF as *const u32); } loop {} } - -// define the hard fault handler -exception!(HardFault, hard_fault); - -fn hard_fault(ef: &ExceptionFrame) -> ! { - panic!("HardFault at {:#?}", ef); -} - -// define the default exception handler -exception!(*, default_handler); - -fn default_handler(irqn: i16) { - panic!("Unhandled exception (IRQn = {})", irqn); -} diff --git a/examples/device.rs b/examples/device.rs index e2c1a04..26e547a 100644 --- a/examples/device.rs +++ b/examples/device.rs @@ -24,23 +24,17 @@ #![no_main] #![no_std] -extern crate cortex_m; -#[macro_use] -extern crate cortex_m_rt as rt; -extern crate cortex_m_semihosting as sh; -#[macro_use] -extern crate stm32f103xx; -extern crate panic_semihosting; +#[allow(unused_extern_crates)] +extern crate panic_halt; use core::fmt::Write; use cortex_m::peripheral::syst::SystClkSource; -use rt::ExceptionFrame; -use sh::hio::{self, HStdout}; -use stm32f103xx::Interrupt; - -entry!(main); +use cortex_m_rt::entry; +use cortex_m_semihosting::hio::{self, HStdout}; +use stm32f30x::{interrupt, Interrupt}; +#[entry] fn main() -> ! { let p = cortex_m::Peripherals::take().unwrap(); @@ -75,15 +69,3 @@ fn exti0(state: &mut Option) { hstdout.write_str(".").unwrap(); } } - -exception!(HardFault, hard_fault); - -fn hard_fault(ef: &ExceptionFrame) -> ! { - panic!("HardFault at {:#?}", ef); -} - -exception!(*, default_handler); - -fn default_handler(irqn: i16) { - panic!("Unhandled exception (IRQn = {})", irqn); -} diff --git a/examples/exception.rs b/examples/exception.rs index d62e6d4..6b9b103 100644 --- a/examples/exception.rs +++ b/examples/exception.rs @@ -1,8 +1,8 @@ //! Overriding an exception handler //! -//! You can override an exception handler using the [`exception!`][1] macro. +//! You can override an exception handler using the [`#[exception]`][1] attribute. //! -//! [1]: https://docs.rs/cortex-m-rt/0.5.0/cortex_m_rt/macro.exception.html +//! [1]: https://rust-embedded.github.io/cortex-m-rt/0.6.1/cortex_m_rt_macros/fn.exception.html //! //! --- @@ -10,21 +10,16 @@ #![no_main] #![no_std] -extern crate cortex_m; -#[macro_use] -extern crate cortex_m_rt as rt; -extern crate cortex_m_semihosting as sh; -extern crate panic_semihosting; +extern crate panic_halt; use core::fmt::Write; use cortex_m::peripheral::syst::SystClkSource; use cortex_m::Peripherals; -use rt::ExceptionFrame; -use sh::hio::{self, HStdout}; - -entry!(main); +use cortex_m_rt::{entry, exception}; +use cortex_m_semihosting::hio::{self, HStdout}; +#[entry] fn main() -> ! { let p = Peripherals::take().unwrap(); let mut syst = p.SYST; @@ -38,27 +33,15 @@ fn main() -> ! { loop {} } -// try commenting out this line: you'll end in `default_handler` instead of in `sys_tick` -exception!(SysTick, sys_tick, state: Option = None); +#[exception] +fn SysTick() { + static mut STDOUT: Option = None; -fn sys_tick(state: &mut Option) { - if state.is_none() { - *state = Some(hio::hstdout().unwrap()); + if STDOUT.is_none() { + *STDOUT = Some(hio::hstdout().unwrap()); } - if let Some(hstdout) = state.as_mut() { + if let Some(hstdout) = STDOUT.as_mut() { hstdout.write_str(".").unwrap(); } } - -exception!(HardFault, hard_fault); - -fn hard_fault(ef: &ExceptionFrame) -> ! { - panic!("HardFault at {:#?}", ef); -} - -exception!(*, default_handler); - -fn default_handler(irqn: i16) { - panic!("Unhandled exception (IRQn = {})", irqn); -} diff --git a/examples/hello.rs b/examples/hello.rs index 5537379..c7af29b 100644 --- a/examples/hello.rs +++ b/examples/hello.rs @@ -1,24 +1,22 @@ -//! Prints "Hello, world!" on the OpenOCD console using semihosting -//! -//! --- +//! Prints "Hello, world!" on the host console using semihosting #![no_main] #![no_std] -#[macro_use] -extern crate cortex_m_rt; -extern crate cortex_m_semihosting as sh; -extern crate panic_semihosting; +extern crate panic_halt; use core::fmt::Write; -use sh::hio; - -entry!(main); +use cortex_m_rt::entry; +use cortex_m_semihosting::{debug, hio}; +#[entry] fn main() -> ! { let mut stdout = hio::hstdout().unwrap(); writeln!(stdout, "Hello, world!").unwrap(); + // exit QEMU or the debugger section + debug::exit(debug::EXIT_SUCCESS); + loop {} } diff --git a/examples/itm.rs b/examples/itm.rs index 6fddea1..f82f985 100644 --- a/examples/itm.rs +++ b/examples/itm.rs @@ -17,38 +17,17 @@ #![no_main] #![no_std] -#[macro_use] -extern crate cortex_m; -#[macro_use] -extern crate cortex_m_rt as rt; -extern crate panic_semihosting; +extern crate panic_halt; -use cortex_m::{asm, Peripherals}; -use rt::ExceptionFrame; - -entry!(main); +use cortex_m::{iprintln, Peripherals}; +use cortex_m_rt::entry; +#[entry] fn main() -> ! { let mut p = Peripherals::take().unwrap(); let stim = &mut p.ITM.stim[0]; iprintln!(stim, "Hello, world!"); - loop { - asm::bkpt(); - } -} - -// define the hard fault handler -exception!(HardFault, hard_fault); - -fn hard_fault(ef: &ExceptionFrame) -> ! { - panic!("HardFault at {:#?}", ef); -} - -// define the default exception handler -exception!(*, default_handler); - -fn default_handler(irqn: i16) { - panic!("Unhandled exception (IRQn = {})", irqn); + loop {} } diff --git a/examples/minimal.rs b/examples/minimal.rs deleted file mode 100644 index e573932..0000000 --- a/examples/minimal.rs +++ /dev/null @@ -1,40 +0,0 @@ -//! Minimal Cortex-M program -//! -//! When executed this program will hit the breakpoint set in `main`. -//! -//! All Cortex-M programs need to: -//! -//! - Contain the `#![no_main]` and `#![no_std]` attributes. Embedded programs don't use the -//! standard Rust `main` interface or the Rust standard (`std`) library. -//! -//! - Define their entry point using [`entry!`] macro. -//! -//! [`entry!`]: https://docs.rs/cortex-m-rt/~0.5/cortex_m_rt/macro.entry.html -//! -//! - Define their panicking behavior, i.e. what happens when `panic!` is called. The easiest way to -//! define a panicking behavior is to link to a [panic handler crate][0] -//! -//! [0]: https://crates.io/keywords/panic-impl - -#![no_main] // <- IMPORTANT! -#![no_std] - -extern crate cortex_m; - -#[macro_use(entry)] -extern crate cortex_m_rt as rt; - -// makes `panic!` print messages to the host stderr using semihosting -extern crate panic_semihosting; - -use cortex_m::asm; - -// the program entry point is ... -entry!(main); - -// ... this never ending function -fn main() -> ! { - loop { - asm::bkpt(); - } -} diff --git a/examples/panic.rs b/examples/panic.rs index 0822156..a323396 100644 --- a/examples/panic.rs +++ b/examples/panic.rs @@ -1,44 +1,28 @@ -//! Changing the panic handler +//! Changing the panicking behavior //! -//! The easiest way to change the panic handler is to use a different [panic handler crate][0]. +//! The easiest way to change the panicking behavior is to use a different [panic handler crate][0]. //! //! [0]: https://crates.io/keywords/panic-impl -//! -//! --- #![no_main] #![no_std] -#[macro_use] -extern crate cortex_m_rt as rt; +// Pick one of these panic handlers: -// Pick one of these two panic handlers: +// `panic!` halts execution; the panic message is ignored +extern crate panic_halt; // Reports panic messages to the host stderr using semihosting -extern crate panic_semihosting; +// NOTE to use this you need to uncomment the `panic-semihosting` dependency in Cargo.toml +// extern crate panic_semihosting; // Logs panic messages using the ITM (Instrumentation Trace Macrocell) // NOTE to use this you need to uncomment the `panic-itm` dependency in Cargo.toml // extern crate panic_itm; -use rt::ExceptionFrame; - -entry!(main); +use cortex_m_rt::entry; +#[entry] fn main() -> ! { panic!("Oops") } - -// define the hard fault handler -exception!(HardFault, hard_fault); - -fn hard_fault(ef: &ExceptionFrame) -> ! { - panic!("HardFault at {:#?}", ef); -} - -// define the default exception handler -exception!(*, default_handler); - -fn default_handler(irqn: i16) { - panic!("Unhandled exception (IRQn = {})", irqn); -} diff --git a/memory.x b/memory.x index ee7e8a8..ade393b 100644 --- a/memory.x +++ b/memory.x @@ -1,6 +1,6 @@ MEMORY { - /* NOTE K = KiBi = 1024 bytes */ + /* NOTE 1 K = 1 KiBi = 1024 bytes */ /* TODO Adjust these memory regions to match your device memory layout */ /* These values correspond to the LM3S6965, one of the few devices QEMU can emulate */ FLASH : ORIGIN = 0x00000000, LENGTH = 256K @@ -19,6 +19,3 @@ MEMORY /* This is required only on microcontrollers that store some configuration right after the vector table */ /* _stext = ORIGIN(FLASH) + 0x400; */ - -/* Size of the heap (in bytes) */ -/* _heap_size = 1024; */ diff --git a/openocd.gdb b/openocd.gdb index bacba86..55cf8ac 100644 --- a/openocd.gdb +++ b/openocd.gdb @@ -3,10 +3,14 @@ target remote :3333 # print demangled symbols set print asm-demangle on -# detect unhandled exceptions and hard faults +# detect unhandled exceptions, hard faults and panics break DefaultHandler break UserHardFault +break rust_begin_unwind monitor arm semihosting enable -load \ No newline at end of file +load + +# start the process but immediately halt the processor +stepi \ No newline at end of file diff --git a/src/main.rs b/src/main.rs index 23646c3..3142280 100644 --- a/src/main.rs +++ b/src/main.rs @@ -1,19 +1,17 @@ -#![no_main] #![no_std] +#![no_main] -extern crate cortex_m; -#[macro_use] -extern crate cortex_m_rt; - -// TODO pick a panicking behavior +// pick a panicking behavior +extern crate panic_halt; // you can put a breakpoint on `rust_begin_unwind` to catch panics // extern crate panic_abort; // requires nightly -// extern crate panic_itm; // requires ITM support -// extern crate panic_semihosting; // requires a debugger +// extern crate panic_itm; // logs messages over ITM; requires ITM support +// extern crate panic_semihosting; // logs messages to the host stderr; requires a debugger -entry!(main); +use cortex_m_rt::entry; +#[entry] fn main() -> ! { loop { - // TODO your code goes here + // your code goes here } } From 9facab296096e5083ddf0ea7f6838b3a8926bc65 Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Thu, 13 Sep 2018 21:40:25 +0200 Subject: [PATCH 3/9] backport fixes from the book plus other small updates --- .cargo/config | 6 ++++-- Cargo.toml | 7 ++----- README.md | 19 +++++++++++-------- 3 files changed, 17 insertions(+), 15 deletions(-) diff --git a/.cargo/config b/.cargo/config index b9bbec9..04b71ea 100644 --- a/.cargo/config +++ b/.cargo/config @@ -3,9 +3,11 @@ # runner = "qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel" [target.'cfg(all(target_arch = "arm", target_os = "none"))'] -# uncomment this to make `cargo run` start a GDB session -# NOTE: you may need to change `arm-none-eabi-gdb` +# uncomment ONE of these three option to make `cargo run` start a GDB session +# which option to pick depends on your system # runner = "arm-none-eabi-gdb -x openocd.gdb" +# runner = "gdb-multiarch -x openocd.gdb" +# runner = "gdb -x openocd.gdb" rustflags = [ # LLD (shipped with the Rust toolchain) is used as the default linker diff --git a/Cargo.toml b/Cargo.toml index ebc43d1..4aebd78 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,9 +1,6 @@ -# TODO remove -cargo-features = ["edition"] - [package] -edition = "2018" authors = ["{{authors}}"] +edition = "2018" name = "{{project-name}}" version = "0.1.0" @@ -14,7 +11,7 @@ cortex-m-semihosting = "0.3.1" panic-halt = "0.1.3" # Uncomment for the panic example. -# panic-itm = "0.3.0" +# panic-itm = "0.4.0" # Uncomment for the allocator example. # alloc-cortex-m = "0.3.5" diff --git a/README.md b/README.md index 14c6437..bd49bc3 100644 --- a/README.md +++ b/README.md @@ -8,9 +8,11 @@ This project is developed and maintained by the [Cortex-M team][team]. To build embedded programs using this template you'll need: -- Rust 1.30-beta or nightly. `rustup default beta` +- Rust 1.30, 1.30-beta, nightly-2018-09-13 or a newer toolchain. e.g. `rustup + default beta` -- The `cargo generate` subcommand: `cargo install cargo-generate` +- The `cargo generate` subcommand. [Installation + instructions](https://github.com/ashleygwilliams/cargo-generate#installation). - `rust-std` components (pre-compiled `core` crate) for the ARM Cortex-M targets. Run: @@ -22,9 +24,10 @@ $ rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabi th ## Using this template **NOTE**: This is the very short version that only covers building programs. For -the long version check [the embedded Rust book][book]. +the long version, which additionally covers flashing, running and debugging +programs, check [the embedded Rust book][book]. -[book]: https://rust-embedded.github.io/book/blinky/blinky.html +[book]: http://book.rust-embedded.org 0. Before we begin you need to identify some characteristics of the target device as these will be used to configure the project: @@ -33,7 +36,8 @@ the long version check [the embedded Rust book][book]. - Does the ARM core include an FPU? Cortex-M4**F** and Cortex-M7**F** cores do. -- How much Flash memory and RAM does the target device has? e.g. 40 KB of RAM +- How much Flash memory and RAM does the target device has? e.g. 256 KiB of + Flash and 32 KiB of RAM. - Where are Flash memory and RAM mapped in the address space? e.g. RAM is commonly located at address `0x2000_0000`. @@ -46,9 +50,9 @@ STM32F303VCT6 microcontroller. This microcontroller has: - A Cortex-M4F core that includes a single precision FPU -- 256 KB of Flash located at address 0x0800_0000. +- 256 KiB of Flash located at address 0x0800_0000. -- 40 KB of RAM located at address 0x2000_0000. (There's another RAM region but +- 40 KiB of RAM located at address 0x2000_0000. (There's another RAM region but for simplicity we'll ignore it). 1. Instantiate the template. @@ -66,7 +70,6 @@ $ cd app bottom of `.cargo/config`. For the STM32F303VCT6, which has a Cortex-M4F core, we'll pick the `thumbv7em-none-eabihf` target. - ``` console $ tail -n6 .cargo/config ``` From 728d57d002025ef275c59753665b052fd925a75a Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Fri, 14 Sep 2018 19:04:27 +0200 Subject: [PATCH 4/9] openocd.cfg: add support for older revisions of the discovery --- openocd.cfg | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/openocd.cfg b/openocd.cfg index 74c9af9..81551c8 100644 --- a/openocd.cfg +++ b/openocd.cfg @@ -1,2 +1,12 @@ +# Sample OpenOCD configuration for the STM32F3DISCOVERY development board + +# Depending on the hardware revision you got you'll have to pick ONE of these +# interfaces. At any time only one interface should be commented out. + +# Revision C (newer revision) source [find interface/stlink-v2-1.cfg] + +# Revision A and B (older revisions) +# source [find interface/stlink-v2.cfg] + source [find target/stm32f3x.cfg] From ac4dd36e94afa5dada92471ba9210022da1cc9ad Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Fri, 14 Sep 2018 19:29:42 +0200 Subject: [PATCH 5/9] change the link to the book book.rust-embedded.org is pointing to an old version --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index bd49bc3..f5a277e 100644 --- a/README.md +++ b/README.md @@ -27,7 +27,7 @@ $ rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabi th the long version, which additionally covers flashing, running and debugging programs, check [the embedded Rust book][book]. -[book]: http://book.rust-embedded.org +[book]: https://rust-embedded.github.io/book 0. Before we begin you need to identify some characteristics of the target device as these will be used to configure the project: From 300338f29d9ce3b31466a31161d4df2f7bf0ba9b Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Sat, 15 Sep 2018 03:15:32 +0200 Subject: [PATCH 6/9] quieter GDB --- .cargo/config | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/.cargo/config b/.cargo/config index 04b71ea..fa909f5 100644 --- a/.cargo/config +++ b/.cargo/config @@ -5,9 +5,9 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # uncomment ONE of these three option to make `cargo run` start a GDB session # which option to pick depends on your system -# runner = "arm-none-eabi-gdb -x openocd.gdb" -# runner = "gdb-multiarch -x openocd.gdb" -# runner = "gdb -x openocd.gdb" +# runner = "arm-none-eabi-gdb -q -x openocd.gdb" +# runner = "gdb-multiarch -q -x openocd.gdb" +# runner = "gdb -q -x openocd.gdb" rustflags = [ # LLD (shipped with the Rust toolchain) is used as the default linker From 4e6d85e9a1b7f319675606fbf2cfe0f5010c0c0e Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Tue, 18 Sep 2018 00:33:26 +0200 Subject: [PATCH 7/9] minify --- .github/CODEOWNERS | 1 - .github/bors.toml | 4 - .travis.yml | 52 ----------- CHANGELOG.md | 222 -------------------------------------------- CODE_OF_CONDUCT.md | 37 -------- LICENSE-APACHE | 201 --------------------------------------- LICENSE-MIT | 25 ----- ci/after-success.sh | 20 ---- ci/install.sh | 9 -- ci/script.sh | 72 -------------- gen-examples.sh | 56 ----------- 11 files changed, 699 deletions(-) delete mode 100644 .github/CODEOWNERS delete mode 100644 .github/bors.toml delete mode 100644 .travis.yml delete mode 100644 CHANGELOG.md delete mode 100644 CODE_OF_CONDUCT.md delete mode 100644 LICENSE-APACHE delete mode 100644 LICENSE-MIT delete mode 100644 ci/after-success.sh delete mode 100644 ci/install.sh delete mode 100644 ci/script.sh delete mode 100644 gen-examples.sh diff --git a/.github/CODEOWNERS b/.github/CODEOWNERS deleted file mode 100644 index 21baf47..0000000 --- a/.github/CODEOWNERS +++ /dev/null @@ -1 +0,0 @@ -* @rust-embedded/cortex-m diff --git a/.github/bors.toml b/.github/bors.toml deleted file mode 100644 index ca42be0..0000000 --- a/.github/bors.toml +++ /dev/null @@ -1,4 +0,0 @@ -block_labels = ["needs-decision"] -delete_merged_branches = true -required_approvals = 1 -status = ["continuous-integration/travis-ci/push"] diff --git a/.travis.yml b/.travis.yml deleted file mode 100644 index e620b74..0000000 --- a/.travis.yml +++ /dev/null @@ -1,52 +0,0 @@ -language: rust - -matrix: - include: - - env: TARGET=x86_64-unknown-linux-gnu - rust: nightly - if: branch = master AND type != pull_request - - - env: TARGET=thumbv6m-none-eabi - rust: nightly - if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) - - - env: TARGET=thumbv7m-none-eabi - rust: nightly - if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) - - - env: TARGET=thumbv7em-none-eabi - rust: nightly - if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) - - - env: TARGET=thumbv7em-none-eabihf - rust: nightly - if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) - -before_install: set -e - -install: - - bash ci/install.sh - -script: - - bash ci/script.sh - -after_success: - - bash ci/after-success.sh - -after_script: set +e - -cache: cargo - -before_cache: - # Travis can't cache files that are not readable by "others" - - chmod -R a+r $HOME/.cargo - -branches: - only: - - master - - staging - - trying - -notifications: - email: - on_success: never diff --git a/CHANGELOG.md b/CHANGELOG.md deleted file mode 100644 index 1190551..0000000 --- a/CHANGELOG.md +++ /dev/null @@ -1,222 +0,0 @@ -# Change Log - -All notable changes to this project will be documented in this file. -This project adheres to [Semantic Versioning](http://semver.org/). - -## [Unreleased] - -## [v0.3.4] - 2018-08-27 - -### Changed - -- LLD is now used as the default linker. -- Updated the troubleshooting guide to reflect the change in the default linker. -- Simplified the minimal example. -- The examples in this template no longer require `arm-none-eabi-gcc` to build. - -## [v0.3.3] - 2018-08-07 - -### Changed - -- Stopped recommending LLD as it requires an unstable feature. - -### Fixed - -- The allocator example. It now uses the `#[alloc_error_handler]` attribute - instead of the unstable `oom` lang item. - -## [v0.3.2] - 2018-06-19 - -### Fixed - -- Bumped the panic-semihosting dependency to fix some examples when compiling with latest nightly. - -## [v0.3.1] - 2018-05-13 - -- Document the standard `main` interface issue in the troubleshooting guide. - -## [v0.3.0] - 2018-05-12 - -### Changed - -- [breaking-change] `arm-none-eabi-gcc` is now a mandatory dependency as it's required by the - `cortex-m-rt` dependency and also the default linker. - -- Bumped the `cortex-m` and `cortex-m-rt` dependencies to v0.5.0. Updated all the examples to match - the new `cortex-m-rt` API. - -- Updated the `allocator` example to compile on a recent nightly. - -- Set the number of codegen-units to 1 when compiling in release mode. This produces smaller and - faster binaries. - -### Removed - -- Removed `opt-level = "s"` from `profile.release`. This flag is still unstable. - -## [v0.2.7] - 2018-04-24 - -### Changed - -- Bumped the dependency of `cortex-m-rt` to v0.4.0. - -## [v0.2.6] - 2018-04-09 - -### Changed - -- The documentation to instruct the user to use Cargo instead of Xargo - -## [v0.2.5] - 2018-02-26 - -### Added - -- Comments to Cargo.toml and Xargo.toml to make it easier to try the examples. - -### Fixed - -- The `allocator` example to use the `#[global_allocator]` feature. - -## [v0.2.4] - 2018-01-26 - -### Changed - -- Disable ThinLTO which causes extreme binary size bloat. See rust-lang/rust#47770 for details. - -## [v0.2.3] - 2018-01-20 - -### Changed - -- Tweaked docs. Instruction steps are now numbered. - -### Removed - -- The `CARGO_INCREMENTAL=1` workaround has been removed since it's now controlled via Cargo.toml and - we have the setting disabled in the template. - -## [v0.2.2] - 2018-01-17 - -### Added - -- Troubleshooting documentation: how to workaround the "Ignoring packet error, continuing..." GDB - error. - -### Changed - -- Disabled incremental compilation and parallel codegen on the dev profile to reduce the changes of - running into rust-lang/rust#47074. - -- Bumped the version of the `cortex-m-rt` dependency to v0.3.12. - -## [v0.2.1] - 2017-07-14 - -### Added - -- Troubleshooting documentation: how to fix the error of overwriting the - `.cargo/config` file when you meant to append text to it. - -### Changed - -- Xargo.toml: Changed the source of the `compiler-builtins` crate from git to - the `rust-src` component. - -- Expanded the `device` example to do some I/O. - -## [v0.2.0] - 2017-07-07 - -### Changed - -- [breaking-change] Bumped the cortex-m and cortex-m-rt versions to v0.3.0. - -## [v0.1.8] - 2017-05-30 - -### Changed - -- Bumped the cortex-m-rt dependency to v0.2.3, and documented the `_stext` - symbol (see memory.x). - -## [v0.1.7] - 2017-05-27 - -### Added - -- Documentation and an example about how to use the heap and a dynamic memory - allocator. - -### Changed - -- Bumped the `cortex-m-rt` dependency to v0.2.2 -- Bumped the `cortex-m` dependency to v0.2.7 - -## [v0.1.6] - 2017-05-26 - -### Added - -- Set the default runner in .cargo/config to `arm-none-eabi-gdb`. Now `xargo - run` will build the program and start a debug session. - -## [v0.1.5] - 2017-05-16 - -### Added - -- A warning about using CARGO_INCREMENTAL to the how to use and the - troubleshooting sections. - -## [v0.1.4] - 2017-05-13 - -### Added - -- A dependencies section to the documentation - -### Changed - -- Extend troubleshooting section - -## [v0.1.3] - 2017-05-13 - -### Added - -- A troubleshooting section to the documentation - -### Changed - -- Bumped the cortex-m crate version to v0.2.6 - -## [v0.1.2] - 2017-05-07 - -### Fixed - -- .gdbinit: jump to reset handler after loading the program. - -## [v0.1.1] - 2017-04-27 - -### Changed - -- Bumped the version of the `cortex-m-rt` dependency to v0.2.0. NOTE that the - instantiation steps have slightly changed, the `memory.x` file changed, - because of this. - -## v0.1.0 - 2017-04-25 - -- Initial release - -[Unreleased]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.3.4...HEAD -[v0.3.4]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.3.3...v0.3.4 -[v0.3.3]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.3.2...v0.3.3 -[v0.3.2]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.3.1...v0.3.2 -[v0.3.1]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.3.0...v0.3.1 -[v0.3.0]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.2.7...v0.3.0 -[v0.2.7]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.2.6...v0.2.7 -[v0.2.6]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.2.5...v0.2.6 -[v0.2.5]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.2.4...v0.2.5 -[v0.2.4]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.2.3...v0.2.4 -[v0.2.3]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.2.2...v0.2.3 -[v0.2.2]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.2.1...v0.2.2 -[v0.2.1]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.2.0...v0.2.1 -[v0.2.0]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.8...v0.2.0 -[v0.1.8]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.7...v0.1.8 -[v0.1.7]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.6...v0.1.7 -[v0.1.6]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.5...v0.1.6 -[v0.1.5]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.4...v0.1.5 -[v0.1.4]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.3...v0.1.4 -[v0.1.3]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.2...v0.1.3 -[v0.1.2]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.1...v0.1.2 -[v0.1.1]: https://github.com/rust-embedded/cortex-m-quickstart/compare/v0.1.0...v0.1.1 diff --git a/CODE_OF_CONDUCT.md b/CODE_OF_CONDUCT.md deleted file mode 100644 index 3ab76c6..0000000 --- a/CODE_OF_CONDUCT.md +++ /dev/null @@ -1,37 +0,0 @@ -# The Rust Code of Conduct - -## Conduct - -**Contact**: [Cortex-M team](https://github.com/rust-embedded/wg#the-cortex-m-team) - -* We are committed to providing a friendly, safe and welcoming environment for all, regardless of level of experience, gender identity and expression, sexual orientation, disability, personal appearance, body size, race, ethnicity, age, religion, nationality, or other similar characteristic. -* On IRC, please avoid using overtly sexual nicknames or other nicknames that might detract from a friendly, safe and welcoming environment for all. -* Please be kind and courteous. There's no need to be mean or rude. -* Respect that people have differences of opinion and that every design or implementation choice carries a trade-off and numerous costs. There is seldom a right answer. -* Please keep unstructured critique to a minimum. If you have solid ideas you want to experiment with, make a fork and see how it works. -* We will exclude you from interaction if you insult, demean or harass anyone. That is not welcome behavior. We interpret the term "harassment" as including the definition in the [Citizen Code of Conduct](http://citizencodeofconduct.org/); if you have any lack of clarity about what might be included in that concept, please read their definition. In particular, we don't tolerate behavior that excludes people in socially marginalized groups. -* Private harassment is also unacceptable. No matter who you are, if you feel you have been or are being harassed or made uncomfortable by a community member, please contact one of the channel ops or any of the [Cortex-M team][team] immediately. Whether you're a regular contributor or a newcomer, we care about making this community a safe place for you and we've got your back. -* Likewise any spamming, trolling, flaming, baiting or other attention-stealing behavior is not welcome. - -## Moderation - -These are the policies for upholding our community's standards of conduct. - -1. Remarks that violate the Rust standards of conduct, including hateful, hurtful, oppressive, or exclusionary remarks, are not allowed. (Cursing is allowed, but never targeting another user, and never in a hateful manner.) -2. Remarks that moderators find inappropriate, whether listed in the code of conduct or not, are also not allowed. -3. Moderators will first respond to such remarks with a warning. -4. If the warning is unheeded, the user will be "kicked," i.e., kicked out of the communication channel to cool off. -5. If the user comes back and continues to make trouble, they will be banned, i.e., indefinitely excluded. -6. Moderators may choose at their discretion to un-ban the user if it was a first offense and they offer the offended party a genuine apology. -7. If a moderator bans someone and you think it was unjustified, please take it up with that moderator, or with a different moderator, **in private**. Complaints about bans in-channel are not allowed. -8. Moderators are held to a higher standard than other community members. If a moderator creates an inappropriate situation, they should expect less leeway than others. - -In the Rust community we strive to go the extra step to look out for each other. Don't just aim to be technically unimpeachable, try to be your best self. In particular, avoid flirting with offensive or sensitive issues, particularly if they're off-topic; this all too often leads to unnecessary fights, hurt feelings, and damaged trust; worse, it can drive people away from the community entirely. - -And if someone takes issue with something you said or did, resist the urge to be defensive. Just stop doing what it was they complained about and apologize. Even if you feel you were misinterpreted or unfairly accused, chances are good there was something you could've communicated better — remember that it's your responsibility to make your fellow Rustaceans comfortable. Everyone wants to get along and we are all here first and foremost because we want to talk about cool technology. You will find that people will be eager to assume good intent and forgive as long as you earn their trust. - -The enforcement policies listed above apply to all official embedded WG venues; including official IRC channels (#rust-embedded); GitHub repositories under rust-embedded; and all forums under rust-embedded.org (forum.rust-embedded.org). - -*Adapted from the [Node.js Policy on Trolling](http://blog.izs.me/post/30036893703/policy-on-trolling) as well as the [Contributor Covenant v1.3.0](https://www.contributor-covenant.org/version/1/3/0/).* - -[team]: https://github.com/rust-embedded/wg#the-cortex-m-team diff --git a/LICENSE-APACHE b/LICENSE-APACHE deleted file mode 100644 index 16fe87b..0000000 --- a/LICENSE-APACHE +++ /dev/null @@ -1,201 +0,0 @@ - Apache License - Version 2.0, January 2004 - http://www.apache.org/licenses/ - -TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION - -1. 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We also recommend that a - file or class name and description of purpose be included on the - same "printed page" as the copyright notice for easier - identification within third-party archives. - -Copyright [yyyy] [name of copyright owner] - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. diff --git a/LICENSE-MIT b/LICENSE-MIT deleted file mode 100644 index 815d6c0..0000000 --- a/LICENSE-MIT +++ /dev/null @@ -1,25 +0,0 @@ -Copyright (c) 2018 - -Permission is hereby granted, free of charge, to any -person obtaining a copy of this software and associated -documentation files (the "Software"), to deal in the -Software without restriction, including without -limitation the rights to use, copy, modify, merge, -publish, distribute, sublicense, and/or sell copies of -the Software, and to permit persons to whom the Software -is furnished to do so, subject to the following -conditions: - -The above copyright notice and this permission notice -shall be included in all copies or substantial portions -of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF -ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED -TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A -PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT -SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY -CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR -IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -DEALINGS IN THE SOFTWARE. diff --git a/ci/after-success.sh b/ci/after-success.sh deleted file mode 100644 index 4377267..0000000 --- a/ci/after-success.sh +++ /dev/null @@ -1,20 +0,0 @@ -set -euxo pipefail - -main() { - cargo doc - - mkdir ghp-import - - curl -Ls https://github.com/davisp/ghp-import/archive/master.tar.gz | - tar --strip-components 1 -C ghp-import -xz - - ./ghp-import/ghp_import.py target/doc - - set +x - git push -fq https://$GH_TOKEN@github.com/$TRAVIS_REPO_SLUG.git gh-pages && echo OK -} - -# only publish on successful merges to master -if [ $TRAVIS_BRANCH = master ] && [ $TRAVIS_PULL_REQUEST = false ] && [ $TARGET = x86_64-unknown-linux-gnu ]; then - main -fi diff --git a/ci/install.sh b/ci/install.sh deleted file mode 100644 index 3c41921..0000000 --- a/ci/install.sh +++ /dev/null @@ -1,9 +0,0 @@ -set -euxo pipefail - -main() { - if [ $TARGET != x86_64-unknown-linux-gnu ]; then - rustup target add $TARGET - fi -} - -main diff --git a/ci/script.sh b/ci/script.sh deleted file mode 100644 index cfc0c34..0000000 --- a/ci/script.sh +++ /dev/null @@ -1,72 +0,0 @@ -set -euxo pipefail - -main() { - local td=$(mktemp -d) - - git clone . $td - pushd $td - - cat >memory.x <<'EOF' -MEMORY -{ - FLASH : ORIGIN = 0x08000000, LENGTH = 256K - RAM : ORIGIN = 0x20000000, LENGTH = 40K -} -EOF - - local examples=( - crash - exception - hello - minimal - panic - ) - for ex in "${examples[@]}"; do - cargo build --target $TARGET --example $ex - cargo build --target $TARGET --example $ex --release - done - - # ITM is not available on Cortex-M0 - if [ $TARGET != thumbv6m-none-eabi ]; then - local ex=itm - cargo build --target $TARGET --example $ex - cargo build --target $TARGET --example $ex --release - - examples+=( $ex ) - fi - - # Allocator example needs an extra dependency - cat >>Cargo.toml <<'EOF' -[dependencies.alloc-cortex-m] -version = "0.3.4" -EOF - - local ex=allocator - cargo build --target $TARGET --example $ex --release - - examples+=( $ex ) - - # Device example needs an extra dependency - if [ $TARGET = thumbv7m-none-eabi ]; then - cat >>Cargo.toml <<'EOF' -[dependencies.stm32f103xx] -features = ["rt"] -version = "0.10.0" -EOF - - local ex=device - cargo build --target $TARGET --example $ex - cargo build --target $TARGET --example $ex --release - - examples+=( $ex ) - fi - - IFS=,;eval size target/$TARGET/release/examples/"{${examples[*]}}" - - popd - rm -rf $td -} - -if [ $TARGET != x86_64-unknown-linux-gnu ]; then - main -fi diff --git a/gen-examples.sh b/gen-examples.sh deleted file mode 100644 index 5676c01..0000000 --- a/gen-examples.sh +++ /dev/null @@ -1,56 +0,0 @@ -# Converts the examples in the `examples` directory into documentation in the -# `examples` module (`src/examples/*.rs`) - -set -ex - -main() { - local examples=( - minimal - hello - itm - panic - crash - exception - allocator - device - ) - - rm -rf src/examples - - mkdir src/examples - - cat >src/examples/mod.rs <<'EOF' -//! Examples sorted in increasing degree of complexity -// Auto-generated. Do not modify. -EOF - - local i=0 out= - for ex in ${examples[@]}; do - name=_${i}_${ex//-/_} - out=src/examples/${name}.rs - - echo "pub mod $name;" >> src/examples/mod.rs - - grep '//!' examples/$ex.rs > $out - echo '//!' >> $out - echo '//! ```' >> $out - grep -v '//!' examples/$ex.rs | ( - IFS='' - - while read line; do - echo "//! $line" >> $out; - done - ) - echo '//! ```' >> $out - echo '// Auto-generated. Do not modify.' >> $out - - - chmod -x $out - - i=$(( i + 1 )) - done - - chmod -x src/examples/mod.rs -} - -main From 3b8fede353e4ca19c45740f43a54cc236b34f55c Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Tue, 18 Sep 2018 00:37:22 +0200 Subject: [PATCH 8/9] note that 1.30-beta is not out yet --- README.md | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index f5a277e..2bf9d22 100644 --- a/README.md +++ b/README.md @@ -11,6 +11,9 @@ To build embedded programs using this template you'll need: - Rust 1.30, 1.30-beta, nightly-2018-09-13 or a newer toolchain. e.g. `rustup default beta` +> **NOTE**: 1.30-beta is not out yet so you'll have to use the nightly channel +> in the meantime. + - The `cargo generate` subcommand. [Installation instructions](https://github.com/ashleygwilliams/cargo-generate#installation). @@ -104,7 +107,7 @@ $ cargo build # License -Licensed under either of +This template is licensed under either of - Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0) From cffc15846abd378d13772dd096a302bcbd192198 Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Tue, 18 Sep 2018 00:38:06 +0200 Subject: [PATCH 9/9] bump dependencies --- Cargo.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 4aebd78..28ff9d7 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -6,9 +6,9 @@ version = "0.1.0" [dependencies] cortex-m = "0.5.7" -cortex-m-rt = "0.6.1" +cortex-m-rt = "0.6.3" cortex-m-semihosting = "0.3.1" -panic-halt = "0.1.3" +panic-halt = "0.2.0" # Uncomment for the panic example. # panic-itm = "0.4.0"