55 lines
1.2 KiB
Rust
55 lines
1.2 KiB
Rust
//! Sends "Hello, world!" through the ITM port 0
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//!
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//! ITM is much faster than semihosting. Like 4 orders of magnitude or so.
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//!
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//! **NOTE** Cortex-M0 chips don't support ITM.
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//!
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//! You'll have to connect the microcontroller's SWO pin to the SWD interface. Note that some
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//! development boards don't provide this option.
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//!
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//! You'll need [`itmdump`] to receive the message on the host plus you'll need to uncomment two
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//! `monitor` commands in the `.gdbinit` file.
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//!
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//! [`itmdump`]: https://docs.rs/itm/0.2.1/itm/
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//!
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//! ---
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#![no_main]
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#![no_std]
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#[macro_use]
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extern crate cortex_m;
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#[macro_use]
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extern crate cortex_m_rt as rt;
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extern crate panic_semihosting;
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use cortex_m::{asm, Peripherals};
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use rt::ExceptionFrame;
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entry!(main);
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fn main() -> ! {
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let mut p = Peripherals::take().unwrap();
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let stim = &mut p.ITM.stim[0];
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iprintln!(stim, "Hello, world!");
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loop {
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asm::bkpt();
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}
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}
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// define the hard fault handler
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exception!(HardFault, hard_fault);
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fn hard_fault(ef: &ExceptionFrame) -> ! {
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panic!("HardFault at {:#?}", ef);
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}
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// define the default exception handler
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exception!(*, default_handler);
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fn default_handler(irqn: i16) {
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panic!("Unhandled exception (IRQn = {})", irqn);
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}
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