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Jorge Aparicio
2017-03-12 13:01:08 -05:00
commit 63213f3568
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27
.cargo/config Normal file
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[target.thumbv6m-none-eabi]
rustflags = [
"-C", "link-arg=-Tlink.x",
"-C", "link-arg=-Wl,--build-id=none",
"-C", "link-arg=-nostartfiles",
]
[target.thumbv7m-none-eabi]
rustflags = [
"-C", "link-arg=-Tlink.x",
"-C", "link-arg=-Wl,--build-id=none",
"-C", "link-arg=-nostartfiles",
]
[target.thumbv7em-none-eabi]
rustflags = [
"-C", "link-arg=-Tlink.x",
"-C", "link-arg=-Wl,--build-id=none",
"-C", "link-arg=-nostartfiles",
]
[target.thumbv7em-none-eabihf]
rustflags = [
"-C", "link-arg=-Tlink.x",
"-C", "link-arg=-Wl,--build-id=none",
"-C", "link-arg=-nostartfiles",
]

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.gdbinit Normal file
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target remote :3333
monitor arm semihosting enable
# if using ITM
# monitor tpiu config internal itm.fifo uart off 8000000
# monitor itm port 0 on
load
tbreak start
continue

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.gitignore vendored Normal file
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**/*.rs.bk
Cargo.lock
target/

13
Cargo.toml Normal file
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[package]
authors = [{{toml-escape author}}]
name = "cortex-m-quickstart"
version = "0.0.0"
[dependencies]
cortex-m = "0.2.1"
cortex-m-rt = { git = "https://github.com/japaric/cortex-m-rt" }
cortex-m-srp = { git = "https://github.com/japaric/cortex-m-srp" }
{{name}} = "*"
[features]
default = ["cortex-m-rt/linker-script"]

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LICENSE-APACHE Normal file
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25
LICENSE-MIT Normal file
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Copyright (c) 2017 {{toml-escape author}}
Permission is hereby granted, free of charge, to any
person obtaining a copy of this software and associated
documentation files (the "Software"), to deal in the
Software without restriction, including without
limitation the rights to use, copy, modify, merge,
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the Software, and to permit persons to whom the Software
is furnished to do so, subject to the following
conditions:
The above copyright notice and this permission notice
shall be included in all copies or substantial portions
of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.

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README.md Normal file
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# `cortex-m-quickstart`
> Quickstart template to develop bare metal applications for Cortex-M
> microcontrollers
## Usage
```
$ cargo new stm32f100xx --git https://github.com/japaric/cortex-m-quickstart
```
Where `stm32f100xx` is the name of the microcontroller family you are
targeting.
## Supported microcontroller families
- stm32f100xx
- stm32f103xx
- stm32f30x
# License
Licensed under either of
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
http://www.apache.org/licenses/LICENSE-2.0)
- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
at your option.
## Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted
for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
dual licensed as above, without any additional terms or conditions.

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use std::env;
use std::fs::File;
use std::io::Write;
use std::path::PathBuf;
fn main() {
// Put the linker script somewhere the linker can find it
let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
File::create(out.join("memory.x"))
.unwrap()
.write_all(include_bytes!("memory.x"))
.unwrap();
println!("cargo:rustc-link-search={}", out.display());
println!("cargo:rerun-if-changed=build.rs");
println!("cargo:rerun-if-changed=memory.x");
}

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examples/blinky.rs Normal file
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//! LED blinking
//!
//! This example is specific to the STM32F3DISCOVERY board
#![feature(const_fn)]
#![no_std]
extern crate cortex_m;
extern crate cortex_m_rt;
extern crate cortex_m_srp;
extern crate {{name}};
use core::cell::Cell;
use cortex_m::ctxt::Local;
use cortex_m::exception;
use cortex_m_srp::{C0, ResourceP};
use {{name}}::interrupt::{self, Interrupt};
// INITIALIZATION
fn main() {
cortex_m::interrupt::free(|cs| {
let gpioe = {{name}}::GPIOE.borrow(&cs);
let nvic = cortex_m::peripheral::NVIC.borrow(&cs);
let rcc = {{name}}::RCC.borrow(&cs);
let tim7 = {{name}}::TIM7.borrow(&cs);
// enable peripherals
rcc.ahbenr.modify(|_, w| unsafe { w.iopeen().bits(1) });
rcc.apb1enr.modify(|_, w| unsafe { w.tim7en().bits(1) });
// configure PE8 as output
gpioe.moder.modify(|_, w| unsafe { w.moder8().bits(0b01) });
// 1 Hz timeout
tim7.dier.modify(|_, w| unsafe { w.uie().bits(1) });
tim7.psc.write(|w| unsafe { w.psc().bits(122) });
tim7.arr.write(|w| unsafe { w.arr().bits(65040) });
tim7.cr1.write(|w| unsafe { w.cen().bits(1) });
nvic.enable(Interrupt::Tim7);
});
}
// RESOURCES
static GPIOE: ResourceP<{{name}}::Gpioe, C0> =
unsafe { ResourceP::new({{name}}::GPIOE) };
static TIM7: ResourceP<{{name}}::Tim7, C0> =
unsafe { ResourceP::new({{name}}::TIM7) };
// TASKS
extern "C" fn blinky(ctxt: interrupt::Tim7) {
static STATE: Local<Cell<bool>, interrupt::Tim7> =
Local::new(Cell::new(false));
let gpioe = GPIOE.borrow(&ctxt);
let state = STATE.borrow(&ctxt);
let tim7 = TIM7.borrow(&ctxt);
// Clear the update flag
tim7.sr.modify(|_, w| unsafe { w.uif().bits(0) });
// Toggle the state
state.set(!state.get());
// Blink!
if state.get() {
gpioe.bsrr.write(|w| unsafe { w.br8().bits(1) });
} else {
gpioe.bsrr.write(|w| unsafe { w.bs8().bits(1) });
}
}
// GLUE
#[no_mangle]
pub static _INTERRUPTS: interrupt::Handlers =
interrupt::Handlers { tim7: blinky, ..interrupt::DEFAULT_HANDLERS };
#[no_mangle]
pub static _EXCEPTIONS: exception::Handlers =
exception::Handlers { ..exception::DEFAULT_HANDLERS };

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//! Prints "Hello, world!" on the OpenOCD console using semihosting
#![no_std]
#[macro_use]
extern crate cortex_m;
extern crate cortex_m_rt;
extern crate {{name}};
use cortex_m::exception;
use {{name}}::interrupt;
fn main() {
hprintln!("Hello, world!");
}
#[no_mangle]
pub static _INTERRUPTS: interrupt::Handlers =
interrupt::Handlers { ..interrupt::DEFAULT_HANDLERS };
#[no_mangle]
pub static _EXCEPTIONS: exception::Handlers =
exception::Handlers { ..exception::DEFAULT_HANDLERS };

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//! Sends "Hello, world!" through the ITM port 0
//!
//! You'll need [`itmdump`] to receive the message plus you'll need to enable
//! OpenOCD's ITM support in `.gdbinit`.
//!
//! [`itmdump`]: https://docs.rs/itm/0.1.1/itm/
#![no_std]
#[macro_use]
extern crate cortex_m;
extern crate cortex_m_rt;
extern crate {{name}};
use cortex_m::{exception, peripheral};
use {{name}}::interrupt;
fn main() {
cortex_m::interrupt::free(|cs| {
let itm = peripheral::ITM.borrow(&cs);
iprintln!(&itm.stim[0], "Hello, world!");
});
}
#[no_mangle]
pub static _INTERRUPTS: interrupt::Handlers =
interrupt::Handlers { ..interrupt::DEFAULT_HANDLERS };
#[no_mangle]
pub static _EXCEPTIONS: exception::Handlers =
exception::Handlers { ..exception::DEFAULT_HANDLERS };

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//! Minimal application
#![no_std]
extern crate cortex_m;
extern crate cortex_m_rt;
extern crate {{name}};
use cortex_m::exception;
use {{name}}::interrupt;
fn main() {}
#[no_mangle]
pub static _INTERRUPTS: interrupt::Handlers =
interrupt::Handlers { ..interrupt::DEFAULT_HANDLERS };
#[no_mangle]
pub static _EXCEPTIONS: exception::Handlers =
exception::Handlers { ..exception::DEFAULT_HANDLERS };

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MEMORY
{
FLASH : ORIGIN = 0xBAAAAAAD, LENGTH = 0
RAM : ORIGIN = 0xBAAAAAAD, LENGTH = 0
}