Merge pull request #11 from japaric/stext

bump cortex-m-rt version to v0.2.3; document the _stext symbol

.gdbinit

@@ -2,16 +2,16 @@ target remote :3333
 
 monitor arm semihosting enable
 
-## send captured ITM to the file itm.fifo
-## (the microcontroller SWO pin must be connected to the programmer SWO pin)
-## 8000000 must match the core clock frequency
+# # send captured ITM to the file itm.fifo
+# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
+# # 8000000 must match the core clock frequency
 # monitor tpiu config internal itm.fifo uart off 8000000
 
-## OR: make the microcontroller SWO pin output compatible with UART (8N1)
-## 2000000 is the frequency of the SWO pin
+# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
+# # 2000000 is the frequency of the SWO pin
 # monitor tpiu config external uart off 8000000 2000000
 
-## enable ITM port 0
+# # enable ITM port 0
 # monitor itm port 0 on
 
 load

Cargo.toml

@@ -10,7 +10,7 @@ version = "0.1.7"
 
 [dependencies]
 cortex-m = "0.2.7"
-cortex-m-rt = "0.2.2"
+cortex-m-rt = "0.2.3"
 
 [profile.release]
 lto = true

memory.x

@@ -10,3 +10,10 @@ MEMORY
 /* The stack is of the full descending type. */
 /* NOTE Do NOT modify `_stack_start` unless you know what you are doing */
 _stack_start = ORIGIN(RAM) + LENGTH(RAM);
+
+/* You can use this symbol to customize the location of the .text section */
+/* If omitted the .text section will be placed right after the .vector_table
+   section */
+/* This is required only on some microcontrollers that store some configuration
+   right after the vector table */
+/* _stext = ORIGIN(FLASH) + 0x400; */