Merge pull request #49 from rust-embedded/main-itm
break on main; restore ITM configure
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16
openocd.gdb
16
openocd.gdb
@@ -8,8 +8,24 @@ break DefaultHandler
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break UserHardFault
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break rust_begin_unwind
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# *try* to stop at the user entry point (it might be gone due to inlining)
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break main
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monitor arm semihosting enable
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# # send captured ITM to the file itm.fifo
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# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
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# # 8000000 must match the core clock frequency
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# monitor tpiu config internal itm.txt uart off 8000000
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# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
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# # 8000000 must match the core clock frequency
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# # 2000000 is the frequency of the SWO pin
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# monitor tpiu config external uart off 8000000 2000000
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# # enable ITM port 0
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# monitor itm port 0 on
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load
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# start the process but immediately halt the processor
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